Commit 4d765d31 authored by Dmytro Laktyushkin's avatar Dmytro Laktyushkin Committed by Alex Deucher
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drm/amd/display: Enable 4 to 1 mpc combine for max detile use 



In case of certain display configurations we want to allow max detile
buffer utilization by using 4 to 1 mpc combine

Signed-off-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: default avatarEric Bernstein <Eric.Bernstein@amd.com>
Acked-by: default avatarEryk Brol <eryk.brol@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 039efec2

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c

+16 −8
Original line number Diff line number Diff line
@@ -2102,11 +2102,20 @@ int dcn20_populate_dml_pipes_from_context( 
		if (res_ctx->pipe_ctx[i].top_pipe && res_ctx->pipe_ctx[i].top_pipe->plane_state

				== res_ctx->pipe_ctx[i].plane_state) {

			struct pipe_ctx *first_pipe = res_ctx->pipe_ctx[i].top_pipe;

			int split_idx = 0;



			while (first_pipe->top_pipe && first_pipe->top_pipe->plane_state

					== res_ctx->pipe_ctx[i].plane_state)

					== res_ctx->pipe_ctx[i].plane_state) {

				first_pipe = first_pipe->top_pipe;

				split_idx++;

			}

			/* Treat 4to1 mpc combine as an mpo of 2 2-to-1 combines */

			if (split_idx == 0)

				pipes[pipe_cnt].pipe.src.hsplit_grp = first_pipe->pipe_idx;

			else if (split_idx == 1)

				pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].pipe_idx;

			else if (split_idx == 2)

				pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].top_pipe->pipe_idx;

		} else if (res_ctx->pipe_ctx[i].prev_odm_pipe) {

			struct pipe_ctx *first_pipe = res_ctx->pipe_ctx[i].prev_odm_pipe;
@@ -2258,7 +2267,7 @@ int dcn20_populate_dml_pipes_from_context( 
					|| (res_ctx->pipe_ctx[i].top_pipe && res_ctx->pipe_ctx[i].top_pipe->plane_state == pln)

					|| pipes[pipe_cnt].pipe.dest.odm_combine != dm_odm_combine_mode_disabled;



			/* stereo is never split, nor odm combine */

			/* stereo is not split */

			if (pln->stereo_format == PLANE_STEREO_FORMAT_SIDE_BY_SIDE ||

			    pln->stereo_format == PLANE_STEREO_FORMAT_TOP_AND_BOTTOM) {

				pipes[pipe_cnt].pipe.src.is_hsplit = false;
@@ -2721,12 +2730,11 @@ int dcn20_validate_apply_pipe_split_flags( 
		if (!context->res_ctx.pipe_ctx[i].stream)

			continue;



		if (force_split || v->NoOfDPP[vlevel][max_mpc_comb][pipe_plane] > 1) {

			if (split4mpc)

		if (split4mpc || v->NoOfDPP[vlevel][max_mpc_comb][pipe_plane] == 4)

			split[i] = 4;

			else

		else if (force_split || v->NoOfDPP[vlevel][max_mpc_comb][pipe_plane] == 2)

				split[i] = 2;

		}



		if ((pipe->stream->view_format ==

				VIEW_3D_FORMAT_SIDE_BY_SIDE ||

				pipe->stream->view_format ==