Commit 4d3c6c8e authored by Tomas Winkler's avatar Tomas Winkler Committed by Greg Kroah-Hartman
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mei: me: make mei_me_fw_sku_sps_4() less cryptic 



Last add mei_me_fw_sku_sps_4() kdoc and add descriptive defines
for register name and values.

Signed-off-by: default avatarTomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20200619165121.2145330-3-tomas.winkler@intel.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 45a2c762

drivers/misc/mei/hw-me-regs.h

+2 −0
Original line number Diff line number Diff line
@@ -106,6 +106,8 @@ 
/* Host Firmware Status Registers in PCI Config Space */

#define PCI_CFG_HFS_1         0x40

#  define PCI_CFG_HFS_1_D0I3_MSK     0x80000000

#  define PCI_CFG_HFS_1_OPMODE_MSK 0xf0000 /* OP MODE Mask: SPS <= 4.0 */

#  define PCI_CFG_HFS_1_OPMODE_SPS 0xf0000 /* SPS SKU : SPS <= 4.0 */

#define PCI_CFG_HFS_2         0x48

#define PCI_CFG_HFS_3         0x60

#  define PCI_CFG_HFS_3_FW_SKU_MSK   0x00000070

drivers/misc/mei/hw-me.c

+12 −6
Original line number Diff line number Diff line
@@ -1366,20 +1366,26 @@ static bool mei_me_fw_type_nm(const struct pci_dev *pdev) 
#define MEI_CFG_FW_NM                           \

	.quirk_probe = mei_me_fw_type_nm



/**

 * mei_me_fw_sku_sps_4() - check for sps 4.0 sku

 *

 * Read ME FW Status register to check for SPS Firmware.

 * The SPS FW is only signaled in the PCI function 0.

 * __Note__: Deprecated by SPS 5.0 and newer.

 *

 * @pdev: pci device

 *

 * Return: true in case of SPS firmware

 */

static bool mei_me_fw_type_sps_4(const struct pci_dev *pdev)

{

	u32 reg;

	unsigned int devfn;



	/*

	 * Read ME FW Status register to check for SPS Firmware

	 * The SPS FW is only signaled in pci function 0

	 */

	devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);

	pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_1, &reg);

	trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_1", PCI_CFG_HFS_1, reg);

	/* if bits [19:16] = 15, running SPS Firmware */

	return (reg & 0xf0000) == 0xf0000;

	return (reg & PCI_CFG_HFS_1_OPMODE_MSK) == PCI_CFG_HFS_1_OPMODE_SPS;

}



#define MEI_CFG_FW_SPS_4                          \