Commit 4cb7df64 authored by Abel Vesa's avatar Abel Vesa Committed by Shawn Guo
Browse files

ARM: dts: imx7: Use audio_mclk_post_div instead audio_mclk_root_clk



The audio_mclk_root_clk was added as a gate with the CCGR121 (0x4790),
but according to the reference manual, there is no such gate. Moreover,
the consumer driver of the mentioned clock might gate it and leave
the ECSPI2 (the true owner of that gate) hanging. So lets use the
audio_mclk_post_div, which is the parent.

Signed-off-by: default avatarAbel Vesa <abel.vesa@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent e10d2b35
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+2 −2
Original line number Diff line number Diff line
@@ -40,7 +40,7 @@ simple-audio-card,cpu {

		dailink_master: simple-audio-card,codec {
			sound-dai = <&codec>;
			clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
			clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		};
	};
};
@@ -293,7 +293,7 @@ codec: sgtl5000@a {
		compatible = "fsl,sgtl5000";
		#sound-dai-cells = <0>;
		reg = <0x0a>;
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_sai1_mclk>;
		VDDA-supply = <&reg_module_3v3_avdd>;
+1 −1
Original line number Diff line number Diff line
@@ -302,7 +302,7 @@ &i2c2 {
	tlv320aic32x4: audio-codec@18 {
		compatible = "ti,tlv320aic32x4";
		reg = <0x18>;
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		clock-names = "mclk";
		ldoin-supply = <&reg_audio_3v3>;
		iov-supply = <&reg_audio_3v3>;
+1 −1
Original line number Diff line number Diff line
@@ -288,7 +288,7 @@ &i2c4 {
	codec: wm8960@1a {
		compatible = "wlf,wm8960";
		reg = <0x1a>;
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		clock-names = "mclk";
		wlf,shared-lrclk;
	};
+2 −2
Original line number Diff line number Diff line
@@ -31,7 +31,7 @@ simple-audio-card,cpu {

		dailink_master: simple-audio-card,codec {
			sound-dai = <&sgtl5000>;
			clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
			clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		};
	};
};
@@ -41,7 +41,7 @@ sgtl5000: codec@a {
		#sound-dai-cells = <0>;
		reg = <0x0a>;
		compatible = "fsl,sgtl5000";
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_vref_1v8>;
	};
+2 −2
Original line number Diff line number Diff line
@@ -31,7 +31,7 @@ simple-audio-card,cpu {

		dailink_master: simple-audio-card,codec {
			sound-dai = <&sgtl5000>;
			clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
			clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		};
	};
};
@@ -41,7 +41,7 @@ sgtl5000: codec@a {
		#sound-dai-cells = <0>;
		reg = <0x0a>;
		compatible = "fsl,sgtl5000";
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_vref_1v8>;
	};
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