Commit 4bcee17c authored by Michael Riesch's avatar Michael Riesch Committed by Heiko Stuebner
Browse files

arm64: dts: rockchip: enable vop2 and hdmi tx on rock-3a 



Enable the RK356x Video Output Processor (VOP) 2 on the Radxa
ROCK3 Model A.

Signed-off-by: default avatarMichael Riesch <michael.riesch@wolfvision.net>
Reported-by: default avatarkernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/r/20220310210352.451136-4-michael.riesch@wolfvision.net


Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.kernel.org/r/20220422072841.2206452-21-s.hauer@pengutronix.de


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 0c096d6e

arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts

+47 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@ 
#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/leds/common.h>

#include <dt-bindings/pinctrl/rockchip.h>

#include <dt-bindings/soc/rockchip,vop2.h>

#include "rk3568.dtsi"



/ {
@@ -20,6 +21,17 @@ chosen: chosen { 
		stdout-path = "serial2:1500000n8";

	};



	hdmi-con {

		compatible = "hdmi-connector";

		type = "a";



		port {

			hdmi_con_in: endpoint {

				remote-endpoint = <&hdmi_out_con>;

			};

		};

	};



	leds {

		compatible = "gpio-leds";
@@ -166,6 +178,24 @@ &gpu { 
	status = "okay";

};



&hdmi {

	avdd-0v9-supply = <&vdda0v9_image>;

	avdd-1v8-supply = <&vcca1v8_image>;

	status = "okay";

};



&hdmi_in {

	hdmi_in_vp0: endpoint {

		remote-endpoint = <&vp0_out_hdmi>;

	};

};



&hdmi_out {

	hdmi_out_con: endpoint {

		remote-endpoint = <&hdmi_con_in>;

	};

};



&i2c0 {

	status = "okay";
@@ -560,3 +590,20 @@ &usb2phy1_otg { 
	phy-supply = <&vcc5v0_usb_host>;

	status = "okay";

};



&vop {

	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;

	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;

	status = "okay";

};



&vop_mmu {

	status = "okay";

};



&vp0 {

	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {

		reg = <ROCKCHIP_VOP2_EP_HDMI0>;

		remote-endpoint = <&hdmi_in_vp0>;

	};

};