Commit 4b151244 authored by Alain Volmat's avatar Alain Volmat Committed by Patrice Chotard
Browse files

ARM: dts: sti: move usb picophy nodes out of soc in stih410.dtsi 



Move the usb2_picophy1 and usb2_picophy2 nodes out of the soc section.
Since they are controlled via syscfg, there is no reg property needed,
which is required when having the node within the soc section.

Modification is done within stih410.dtsi and within related board
dts files (stih410-b2120.dts, stih410-b2260.dts).

Signed-off-by: default avatarAlain Volmat <avolmat@me.com>
Reviewed-by: default avatarPatrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: default avatarPatrice Chotard <patrice.chotard@foss.st.com>
parent a7436e34

arch/arm/boot/dts/stih410-b2120.dts

+8 −8
Original line number Diff line number Diff line
@@ -24,6 +24,14 @@ aliases { 
		ethernet0 = &ethernet0;

	};



	usb2_picophy1: phy2 {

		status = "okay";

	};



	usb2_picophy2: phy3 {

		status = "okay";

	};



	soc {



		mmc0: sdhci@9060000 {
@@ -33,14 +41,6 @@ mmc0: sdhci@9060000 { 
			sd-uhs-ddr50;

		};



		usb2_picophy1: phy2@0 {

			status = "okay";

		};



		usb2_picophy2: phy3@0 {

			status = "okay";

		};



		ohci0: usb@9a03c00 {

			status = "okay";

		};

arch/arm/boot/dts/stih410-b2260.dts

+8 −8
Original line number Diff line number Diff line
@@ -82,6 +82,14 @@ phy_port1: port@9b2a000 { 
		};

	};



	usb2_picophy1: phy2 {

		status = "okay";

	};



	usb2_picophy2: phy3 {

		status = "okay";

	};



	soc {

		/* Low speed expansion connector */

		uart0: serial@9830000 {
@@ -152,14 +160,6 @@ pwm1: pwm@9510000 { 
			status = "okay";

		};



		usb2_picophy1: phy2@0 {

			status = "okay";

		};



		usb2_picophy2: phy3@0 {

			status = "okay";

		};



		ohci0: usb@9a03c00 {

			status = "okay";

		};

arch/arm/boot/dts/stih410.dtsi

+20 −22
Original line number Diff line number Diff line
@@ -12,10 +12,8 @@ aliases { 
		bdisp0 = &bdisp0;

	};



	soc {

		usb2_picophy1: phy2@0 {

	usb2_picophy1: phy2 {

		compatible = "st,stih407-usb2-phy";

			reg = <0 0>;

		#phy-cells = <0>;

		st,syscfg = <&syscfg_core 0xf8 0xf4>;

		resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
@@ -25,9 +23,8 @@ usb2_picophy1: phy2@0 { 
		status = "disabled";

	};



		usb2_picophy2: phy3@0 {

	usb2_picophy2: phy3 {

		compatible = "st,stih407-usb2-phy";

			reg = <0 0>;

		#phy-cells = <0>;

		st,syscfg = <&syscfg_core 0xfc 0xf4>;

		resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
@@ -37,6 +34,7 @@ usb2_picophy2: phy3@0 { 
		status = "disabled";

	};



	soc {

		ohci0: usb@9a03c00 {

			compatible = "st,st-ohci-300x";

			reg = <0x9a03c00 0x100>;