Commit 486b7680 authored Jun 23, 2020 by Jaehyun Chung Committed by Alex Deucher Jul 08, 2020

drm/amd/display: Send VSIF on unsupported modes on DAL



[Why]
Current DAL behaviour is to not send VSIF if mode does not support VRR
(ie. FS range is < 10Hz). However, we should still set FS Native Color
Active bit in some unsupported mode cases.

[How]
Remove check for if VRR is supported before building infopacket.

Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent cd9a180a

drivers/gpu/drm/amd/display/modules/freesync/freesync.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -790,7 +790,7 @@ void mod_freesync_build_vrr_infopacket(struct mod_freesync *mod_freesync,
		* Check if Freesync is supported. Return if false. If true,
		* set the corresponding bit in the info packet
		*/
		if (!vrr->supported \|\| (!vrr->send_info_frame))
		if (!vrr->send_info_frame)
		return;

		switch (packet_type) {