Commit 481d73c6 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'mvebu-dt64-5.12-1' of...

Merge tag 'mvebu-dt64-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt

mvebu dt64 for 5.12 (part 1)

 - rename u-boot mtd partition to a53-firmware on Turris Mox (Armada 3720 based)
 - improve SDHCI support on AP807 based board
 - move SATA comphy into main armada-37xx.dtsi
 - add Armada 8K/7K PWM support

* tag 'mvebu-dt64-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  arm64: dts: armada: add pwm offsets for ap/cp gpios
  arm64: dts: marvell: armada-37xx: Add SATA comphy into main armada-37xx.dtsi file
  arm64: dts: cn913x-db: enable MMC HS400
  arm64: dts: change AP807 SDHCI compatibility string
  arm64: dts: armada-3720-turris-mox: rename u-boot mtd partition to a53-firmware

Link: https://lore.kernel.org/r/87pn1jn48s.fsf@BL-laptop


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 7e500c89 35db5e32
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+0 −2
Original line number Diff line number Diff line
@@ -67,8 +67,6 @@ &pcie0 {
/* J6 */
&sata {
	status = "okay";
	phys = <&comphy2 0>;
	phy-names = "sata-phy";
};

/* U11 */
+1 −1
Original line number Diff line number Diff line
@@ -205,7 +205,7 @@ partition@0 {
			};

			partition@20000 {
				label = "u-boot";
				label = "a53-firmware";
				reg = <0x20000 0x160000>;
			};

+2 −0
Original line number Diff line number Diff line
@@ -458,6 +458,8 @@ sata: sata@e0000 {
				reg = <0xe0000 0x178>;
				interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&nb_periph_clk 1>;
				phys = <&comphy2 0>;
				phy-names = "sata-phy";
				status = "disabled";
			};

+5 −0
Original line number Diff line number Diff line
@@ -27,3 +27,8 @@ cpu_clk: clock-cpu {
		#clock-cells = <1>;
	};
};

&ap_sdhci0 {
	compatible = "marvell,armada-ap807-sdhci";
};
+3 −0
Original line number Diff line number Diff line
@@ -281,6 +281,9 @@ ap_gpio: gpio@1040 {
					gpio-controller;
					#gpio-cells = <2>;
					gpio-ranges = <&ap_pinctrl 0 0 20>;
					marvell,pwm-offset = <0x10c0>;
					#pwm-cells = <2>;
					clocks = <&ap_clk 3>;
				};
			};

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