Commit 45bb26d9 authored by Weili Qian's avatar Weili Qian Committed by Herbert Xu
Browse files

crypto: hisilicon/qm - set the total number of queues 



Move the configuration of the total number of queues 'ctrl_qp_num'
from sec2/hpre/zip to qm.c. And get the total number of queues
from the hardware register for Kunpeng930.

Signed-off-by: default avatarWeili Qian <qianweili@huawei.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 7d156979

drivers/crypto/hisilicon/hpre/hpre_main.c

+0 −3
Original line number Diff line number Diff line
@@ -13,7 +13,6 @@ 
#include <linux/uacce.h>

#include "hpre.h"



#define HPRE_QUEUE_NUM_V2		1024

#define HPRE_QM_ABNML_INT_MASK		0x100004

#define HPRE_CTRL_CNT_CLR_CE_BIT	BIT(0)

#define HPRE_COMM_CNT_CLR_CE		0x0
@@ -899,8 +898,6 @@ static int hpre_pf_probe_init(struct hpre *hpre) 
	struct hisi_qm *qm = &hpre->qm;

	int ret;



	qm->ctrl_qp_num = HPRE_QUEUE_NUM_V2;



	ret = hpre_set_user_domain_and_cache(qm);

	if (ret)

		return ret;

drivers/crypto/hisilicon/qm.c

+16 −0
Original line number Diff line number Diff line
@@ -93,6 +93,8 @@ 
#define QM_DB_PRIORITY_SHIFT_V1		48

#define QM_DOORBELL_SQ_CQ_BASE_V2	0x1000

#define QM_DOORBELL_EQ_AEQ_BASE_V2	0x2000

#define QM_CAPBILITY			0x100158

#define QM_QP_NUN_MASK			GENMASK(10, 0)

#define QM_DB_CMD_SHIFT_V2		12

#define QM_DB_RAND_SHIFT_V2		16

#define QM_DB_INDEX_SHIFT_V2		32
@@ -4119,6 +4121,17 @@ void hisi_qm_alg_unregister(struct hisi_qm *qm, struct hisi_qm_list *qm_list) 
}

EXPORT_SYMBOL_GPL(hisi_qm_alg_unregister);



static void qm_get_qp_num(struct hisi_qm *qm)

{

	if (qm->ver == QM_HW_V1)

		qm->ctrl_qp_num = QM_QNUM_V1;

	else if (qm->ver == QM_HW_V2)

		qm->ctrl_qp_num = QM_QNUM_V2;

	else

		qm->ctrl_qp_num = readl(qm->io_base + QM_CAPBILITY) &

					QM_QP_NUN_MASK;

}



static int hisi_qm_pci_init(struct hisi_qm *qm)

{

	struct pci_dev *pdev = qm->pdev;
@@ -4146,6 +4159,9 @@ static int hisi_qm_pci_init(struct hisi_qm *qm) 
		goto err_release_mem_regions;

	}



	if (qm->fun_type == QM_HW_PF)

		qm_get_qp_num(qm);



	ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));

	if (ret < 0)

		goto err_iounmap;

drivers/crypto/hisilicon/sec2/sec_main.c

+0 −6
Original line number Diff line number Diff line
@@ -19,7 +19,6 @@ 


#define SEC_VF_NUM			63

#define SEC_QUEUE_NUM_V1		4096

#define SEC_QUEUE_NUM_V2		1024

#define SEC_PF_PCI_DEVICE_ID		0xa255

#define SEC_VF_PCI_DEVICE_ID		0xa256
@@ -784,11 +783,6 @@ static int sec_pf_probe_init(struct sec_dev *sec) 
	struct hisi_qm *qm = &sec->qm;

	int ret;



	if (qm->ver == QM_HW_V1)

		qm->ctrl_qp_num = SEC_QUEUE_NUM_V1;

	else

		qm->ctrl_qp_num = SEC_QUEUE_NUM_V2;



	qm->err_ini = &sec_err_ini;



	ret = sec_set_user_domain_and_cache(qm);

drivers/crypto/hisilicon/zip/zip_main.c

+0 −7
Original line number Diff line number Diff line
@@ -18,7 +18,6 @@ 
#define PCI_DEVICE_ID_ZIP_VF		0xa251



#define HZIP_QUEUE_NUM_V1		4096

#define HZIP_QUEUE_NUM_V2		1024



#define HZIP_CLOCK_GATE_CTRL		0x301004

#define COMP0_ENABLE			BIT(0)
@@ -746,12 +745,6 @@ static int hisi_zip_pf_probe_init(struct hisi_zip *hisi_zip) 


	hisi_zip->ctrl = ctrl;

	ctrl->hisi_zip = hisi_zip;



	if (qm->ver == QM_HW_V1)

		qm->ctrl_qp_num = HZIP_QUEUE_NUM_V1;

	else

		qm->ctrl_qp_num = HZIP_QUEUE_NUM_V2;



	qm->err_ini = &hisi_zip_err_ini;



	hisi_zip_set_user_domain_and_cache(qm);