Commit 41131266 authored by Roger Lu's avatar Roger Lu Committed by Matthias Brugger
Browse files

arm64: dts: mt8183: add svs device information 



Add compatible/reg/irq/clock/efuse setting in svs node.

Signed-off-by: default avatarRoger Lu <roger.lu@mediatek.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: default avatarKevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20220516004311.18358-3-roger.lu@mediatek.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 68163cd1

arch/arm64/boot/dts/mediatek/mt8183.dtsi

+16 −0
Original line number Diff line number Diff line
@@ -1093,6 +1093,18 @@ spi0: spi@1100a000 { 
			status = "disabled";

		};



		svs: svs@1100b000 {

			compatible = "mediatek,mt8183-svs";

			reg = <0 0x1100b000 0 0x1000>;

			interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;

			clocks = <&infracfg CLK_INFRA_THERM>;

			clock-names = "main";

			nvmem-cells = <&svs_calibration>,

				      <&thermal_calibration>;

			nvmem-cell-names = "svs-calibration-data",

					   "t-calibration-data";

		};



		thermal: thermal@1100b000 {

			#thermal-sensor-cells = <1>;

			compatible = "mediatek,mt8183-thermal";
@@ -1611,6 +1623,10 @@ thermal_calibration: calib@180 { 
			mipi_tx_calibration: calib@190 {

				reg = <0x190 0xc>;

			};



			svs_calibration: calib@580 {

				reg = <0x580 0x64>;

			};

		};



		u3phy: t-phy@11f40000 {