Commit 3a6319df authored by Kishon Vijay Abraham I's avatar Kishon Vijay Abraham I Committed by Nishanth Menon
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arm64: dts: ti: k3-j7200-common-proc-board: Enable PCIe 



x2 lane PCIe slot in the common processor board is enabled and connected to
j7200 SOM. Add PCIe DT node in common processor board to reflect the
same.

Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Reviewed-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210105151421.23237-7-kishon@ti.com
parent 429c0259

arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts

+15 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
/dts-v1/;



#include "k3-j7200-som-p0.dtsi"

#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/net/ti-dp83867.h>

#include <dt-bindings/mux/ti-serdes.h>

#include <dt-bindings/phy/phy.h>
@@ -241,3 +242,17 @@ serdes0_qsgmii_link: phy@1 { 
		resets = <&serdes_wiz0 3>;

	};

};



&pcie1_rc {

	reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;

	phys = <&serdes0_pcie_link>;

	phy-names = "pcie-phy";

	num-lanes = <2>;

};



&pcie1_ep {

	phys = <&serdes0_pcie_link>;

	phy-names = "pcie-phy";

	num-lanes = <2>;

	status = "disabled";

};