Commit 3a4413b7 authored by Jayesh Choudhary's avatar Jayesh Choudhary Committed by Vinod Koul
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dmaengine: ti: k3-psil-j721s2: Add psil threads for sa2ul 



Add endpoint configuration for the four ingress and two egress
threads for main domain crypto accelerator.

Signed-off-by: default avatarJayesh Choudhary <j-choudhary@ti.com>
Link: https://lore.kernel.org/r/20220628050232.331956-1-j-choudhary@ti.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 0cae0437

drivers/dma/ti/k3-psil-j721s2.c

+8 −0
Original line number Diff line number Diff line
@@ -112,6 +112,11 @@ static struct psil_ep j721s2_src_ep_map[] = { 
	PSIL_PDMA_XY_PKT(0x4707),

	PSIL_PDMA_XY_PKT(0x4708),

	PSIL_PDMA_XY_PKT(0x4709),

	/* MAIN SA2UL */

	PSIL_SA2UL(0x4a40, 0),

	PSIL_SA2UL(0x4a41, 0),

	PSIL_SA2UL(0x4a42, 0),

	PSIL_SA2UL(0x4a43, 0),

	/* CPSW0 */

	PSIL_ETHERNET(0x7000),

	/* MCU_PDMA0 (MCU_PDMA_MISC_G0) - SPI0 */
@@ -144,6 +149,9 @@ static struct psil_ep j721s2_src_ep_map[] = { 


/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */

static struct psil_ep j721s2_dst_ep_map[] = {

	/* MAIN SA2UL */

	PSIL_SA2UL(0xca40, 1),

	PSIL_SA2UL(0xca41, 1),

	/* CPSW0 */

	PSIL_ETHERNET(0xf000),

	PSIL_ETHERNET(0xf001),