Commit 34a45918 authored by Andre Przywara's avatar Andre Przywara Committed by Sudeep Holla
Browse files

ARM: dts: arm: Fix SP804 users 

The SP804 DT nodes for Realview, MPS2 and VExpress were not complying
with the binding: it requires either one or three clocks, but does not
allow exactly two clocks.

Simply duplicate the first clock to satisfy the binding requirement.
For MPS2, we triple the clock, and add the clock-names property, as this
is required by the Linux primecell driver.
Try to make the clock-names more consistent on the way.

Link: https://lore.kernel.org/r/20200828142018.43298-3-andre.przywara@arm.com


Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
Signed-off-by: default avatarSudeep Holla <sudeep.holla@arm.com>
parent 9123e3a7

arch/arm/boot/dts/arm-realview-pb11mp.dts

+8 −8
Original line number Diff line number Diff line
@@ -568,8 +568,8 @@ timer01: timer@10011000 { 
			clocks = <&sp810_syscon 0>,

			         <&sp810_syscon 1>,

				 <&pclk>;

			clock-names = "timerclk0",

				    "timerclk1",

			clock-names = "timer0clk",

				    "timer1clk",

				    "apb_pclk";

		};
@@ -582,8 +582,8 @@ timer23: timer@10012000 { 
			clocks = <&sp810_syscon 2>,

			         <&sp810_syscon 3>,

				 <&pclk>;

			clock-names = "timerclk2",

				    "timerclk3",

			clock-names = "timer0clk",

				    "timer1clk",

				    "apb_pclk";

		};
@@ -645,16 +645,16 @@ rtc: rtc@10017000 { 
		timer45: timer@10018000 {

			compatible = "arm,sp804", "arm,primecell";

			reg = <0x10018000 0x1000>;

			clocks = <&timclk>, <&pclk>;

			clock-names = "timer", "apb_pclk";

			clocks = <&timclk>, <&timclk>, <&pclk>;

			clock-names = "timer0clk", "timer1clk", "apb_pclk";

			status = "disabled";

		};



		timer67: timer@10019000 {

			compatible = "arm,sp804", "arm,primecell";

			reg = <0x10019000 0x1000>;

			clocks = <&timclk>, <&pclk>;

			clock-names = "timer", "apb_pclk";

			clocks = <&timclk>, <&timclk>, <&pclk>;

			clock-names = "timer0clk", "timer1clk", "apb_pclk";

			status = "disabled";

		};

arch/arm/boot/dts/mps2.dtsi

+4 −2
Original line number Diff line number Diff line
@@ -161,9 +161,11 @@ timer1: mps2-timer1@1000 { 
			};



			timer2: dual-timer@2000 {

				compatible = "arm,sp804";

				compatible = "arm,sp804", "arm,primecell";

				reg = <0x2000 0x1000>;

				clocks = <&sysclk>;

				clocks = <&sysclk>, <&sysclk>, <&sysclk>;

				clock-names = "timer0clk", "timer1clk",

					       "apb_pclk";

				interrupts = <10>;

				status = "disabled";

			};

arch/arm/boot/dts/vexpress-v2p-ca9.dts

+2 −2
Original line number Diff line number Diff line
@@ -122,8 +122,8 @@ timer@100e4000 { 
		reg = <0x100e4000 0x1000>;

		interrupts = <0 48 4>,

			     <0 49 4>;

		clocks = <&oscclk2>, <&oscclk2>;

		clock-names = "timclk", "apb_pclk";

		clocks = <&oscclk2>, <&oscclk2>, <&oscclk2>;

		clock-names = "timer0clk", "timer1clk", "apb_pclk";

		status = "disabled";

	};