Commit 31faff1a authored by Chengming Gui's avatar Chengming Gui Committed by Alex Deucher
Browse files

drm/amdgpu: add lock option for smu_set_soft_freq_range() 



Add lock_needed param for smu_set_soft_freq_range()

Signed-off-by: default avatarChengming Gui <Jack.Gui@amd.com>
Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5b2b2416

drivers/gpu/drm/amd/powerplay/amdgpu_smu.c

+6 −1
Original line number Diff line number Diff line
@@ -210,7 +210,7 @@ int smu_get_smc_version(struct smu_context *smu, uint32_t *if_version, uint32_t 
}



int smu_set_soft_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,

			    uint32_t min, uint32_t max)

			    uint32_t min, uint32_t max, bool lock_needed)

{

	int ret = 0;
@@ -220,7 +220,12 @@ int smu_set_soft_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, 
	if (!smu_clk_dpm_is_enabled(smu, clk_type))

		return 0;



	if (lock_needed)

		mutex_lock(&smu->mutex);

	ret = smu_set_soft_freq_limited_range(smu, clk_type, min, max);

	if (lock_needed)

		mutex_unlock(&smu->mutex);



	return ret;

}

drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h

+1 −1
Original line number Diff line number Diff line
@@ -707,7 +707,7 @@ int smu_get_dpm_level_count(struct smu_context *smu, enum smu_clk_type clk_type, 
int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,

			   uint32_t *min, uint32_t *max, bool lock_needed);

int smu_set_soft_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,

			    uint32_t min, uint32_t max);

			    uint32_t min, uint32_t max, bool lock_needed);

int smu_set_hard_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,

			    uint32_t min, uint32_t max);

int smu_get_dpm_level_range(struct smu_context *smu, enum smu_clk_type clk_type,

drivers/gpu/drm/amd/powerplay/navi10_ppt.c

+7 −7
Original line number Diff line number Diff line
@@ -970,7 +970,7 @@ static int navi10_force_clk_levels(struct smu_context *smu, 
		if (ret)

			return size;



		ret = smu_set_soft_freq_range(smu, clk_type, min_freq, max_freq);

		ret = smu_set_soft_freq_range(smu, clk_type, min_freq, max_freq, false);

		if (ret)

			return size;

		break;
@@ -1094,7 +1094,7 @@ static int navi10_force_dpm_limit_value(struct smu_context *smu, bool highest) 
			return ret;



		force_freq = highest ? max_freq : min_freq;

		ret = smu_set_soft_freq_range(smu, clk_type, force_freq, force_freq);

		ret = smu_set_soft_freq_range(smu, clk_type, force_freq, force_freq, false);

		if (ret)

			return ret;

	}
@@ -1120,7 +1120,7 @@ static int navi10_unforce_dpm_levels(struct smu_context *smu) 
		if (ret)

			return ret;



		ret = smu_set_soft_freq_range(smu, clk_type, min_freq, max_freq);

		ret = smu_set_soft_freq_range(smu, clk_type, min_freq, max_freq, false);

		if (ret)

			return ret;

	}
@@ -1680,10 +1680,10 @@ static int navi10_set_standard_performance_level(struct smu_context *smu) 
		return navi10_set_performance_level(smu, AMD_DPM_FORCED_LEVEL_AUTO);

	}



	ret = smu_set_soft_freq_range(smu, SMU_SCLK, sclk_freq, sclk_freq);

	ret = smu_set_soft_freq_range(smu, SMU_SCLK, sclk_freq, sclk_freq, false);

	if (ret)

		return ret;

	ret = smu_set_soft_freq_range(smu, SMU_UCLK, uclk_freq, uclk_freq);

	ret = smu_set_soft_freq_range(smu, SMU_UCLK, uclk_freq, uclk_freq, false);

	if (ret)

		return ret;
@@ -1748,10 +1748,10 @@ static int navi10_set_peak_performance_level(struct smu_context *smu) 
	if (ret)

		return ret;



	ret = smu_set_soft_freq_range(smu, SMU_SCLK, sclk_freq, sclk_freq);

	ret = smu_set_soft_freq_range(smu, SMU_SCLK, sclk_freq, sclk_freq, false);

	if (ret)

		return ret;

	ret = smu_set_soft_freq_range(smu, SMU_UCLK, uclk_freq, uclk_freq);

	ret = smu_set_soft_freq_range(smu, SMU_UCLK, uclk_freq, uclk_freq, false);

	if (ret)

		return ret;

drivers/gpu/drm/amd/powerplay/renoir_ppt.c

+4 −4
Original line number Diff line number Diff line
@@ -423,7 +423,7 @@ static int renoir_force_dpm_limit_value(struct smu_context *smu, bool highest) 
			return ret;



		force_freq = highest ? max_freq : min_freq;

		ret = smu_set_soft_freq_range(smu, clk_type, force_freq, force_freq);

		ret = smu_set_soft_freq_range(smu, clk_type, force_freq, force_freq, false);

		if (ret)

			return ret;

	}
@@ -456,7 +456,7 @@ static int renoir_unforce_dpm_levels(struct smu_context *smu) { 
		if (ret)

			return ret;



		ret = smu_set_soft_freq_range(smu, clk_type, min_freq, max_freq);

		ret = smu_set_soft_freq_range(smu, clk_type, min_freq, max_freq, false);

		if (ret)

			return ret;

	}
@@ -704,7 +704,7 @@ static int renoir_set_peak_clock_by_device(struct smu_context *smu) 
	if (ret)

		return ret;



	ret = smu_set_soft_freq_range(smu, SMU_SCLK, sclk_freq, sclk_freq);

	ret = smu_set_soft_freq_range(smu, SMU_SCLK, sclk_freq, sclk_freq, false);

	if (ret)

		return ret;
@@ -712,7 +712,7 @@ static int renoir_set_peak_clock_by_device(struct smu_context *smu) 
	if (ret)

		return ret;



	ret = smu_set_soft_freq_range(smu, SMU_UCLK, uclk_freq, uclk_freq);

	ret = smu_set_soft_freq_range(smu, SMU_UCLK, uclk_freq, uclk_freq, false);

	if (ret)

		return ret;