Commit 311531f0 authored by Wenhui Sheng's avatar Wenhui Sheng Committed by Alex Deucher
Browse files

drm/amdgpu: enable mode1 reset 



For sienna cichlid, add mode1 reset path for sGPU.

v2: hiding MP0/MP1 mode1 reset under AMD_RESET_METHOD_MODE1
v3: split emergency restart logic to a new patch

Signed-off-by: default avatarLikun Gao <Likun.Gao@amd.com>
Signed-off-by: default avatarWenhui Sheng <Wenhui.Sheng@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent bb5c7235

drivers/gpu/drm/amd/amdgpu/nv.c

+12 −7
Original line number Diff line number Diff line
@@ -265,17 +265,21 @@ static int nv_asic_mode1_reset(struct amdgpu_device *adev) 


	amdgpu_atombios_scratch_regs_engine_hung(adev, true);



	dev_info(adev->dev, "GPU mode1 reset\n");



	/* disable BM */

	pci_clear_master(adev->pdev);



	pci_save_state(adev->pdev);



	if (amdgpu_dpm_is_mode1_reset_supported(adev)) {

		dev_info(adev->dev, "GPU smu mode1 reset\n");

		ret = amdgpu_dpm_mode1_reset(adev);

	} else {

		dev_info(adev->dev, "GPU psp mode1 reset\n");

		ret = psp_gpu_reset(adev);

	}



	if (ret)

		dev_err(adev->dev, "GPU mode1 reset failed\n");



	pci_restore_state(adev->pdev);



	/* wait for asic to come out of reset */
@@ -307,7 +311,7 @@ nv_asic_reset_method(struct amdgpu_device *adev) 
{

	struct smu_context *smu = &adev->smu;



	if (!amdgpu_sriov_vf(adev) && smu_baco_is_support(smu))

	if (smu_baco_is_support(smu))

		return AMD_RESET_METHOD_BACO;

	else

		return AMD_RESET_METHOD_MODE1;
@@ -319,15 +323,16 @@ static int nv_asic_reset(struct amdgpu_device *adev) 
	struct smu_context *smu = &adev->smu;



	if (nv_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {

		dev_info(adev->dev, "GPU BACO reset\n");



		ret = smu_baco_enter(smu);

		if (ret)

			return ret;

		ret = smu_baco_exit(smu);

		if (ret)

			return ret;

	} else {

	} else

		ret = nv_asic_mode1_reset(adev);

	}



	return ret;

}

drivers/gpu/drm/amd/powerplay/navi10_ppt.c

+1 −1
Original line number Diff line number Diff line
@@ -2057,7 +2057,7 @@ static bool navi10_is_baco_supported(struct smu_context *smu) 
	struct amdgpu_device *adev = smu->adev;

	uint32_t val;



	if (!smu_v11_0_baco_is_support(smu))

	if (amdgpu_sriov_vf(adev) || (!smu_v11_0_baco_is_support(smu)))

		return false;



	val = RREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP0);

drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c

+1 −1
Original line number Diff line number Diff line
@@ -1773,7 +1773,7 @@ static bool sienna_cichlid_is_baco_supported(struct smu_context *smu) 
	struct amdgpu_device *adev = smu->adev;

	uint32_t val;



	if (!smu_v11_0_baco_is_support(smu))

	if (amdgpu_sriov_vf(adev) || (!smu_v11_0_baco_is_support(smu)))

		return false;



	val = RREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP0);