Commit 2752bb7d authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Bjorn Andersson
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arm64: dts: qcom: msm8996: add second DSI interface 



Add device nodes for the DSI1, second DSI interface found on
MSM8996/APQ8096 platforms. For example on db820c it is routed to the
secondary HS expansion connector.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220617103652.606250-1-dmitry.baryshkov@linaro.org
parent 2e4ae611

arch/arm64/boot/dts/qcom/msm8996.dtsi

+73 −0
Original line number Diff line number Diff line
@@ -848,6 +848,13 @@ mdp5_intf1_out: endpoint { 
							remote-endpoint = <&dsi0_in>;

						};

					};



					port@2 {

						reg = <2>;

						mdp5_intf2_out: endpoint {

							remote-endpoint = <&dsi1_in>;

						};

					};

				};

			};
@@ -917,6 +924,72 @@ dsi0_phy: dsi-phy@994400 { 
				status = "disabled";

			};



			dsi1: dsi@996000 {

				compatible = "qcom,mdss-dsi-ctrl";

				reg = <0x00996000 0x400>;

				reg-names = "dsi_ctrl";



				interrupt-parent = <&mdss>;

				interrupts = <4>;



				clocks = <&mmcc MDSS_MDP_CLK>,

					 <&mmcc MDSS_BYTE1_CLK>,

					 <&mmcc MDSS_AHB_CLK>,

					 <&mmcc MDSS_AXI_CLK>,

					 <&mmcc MMSS_MISC_AHB_CLK>,

					 <&mmcc MDSS_PCLK1_CLK>,

					 <&mmcc MDSS_ESC1_CLK>;

				clock-names = "mdp_core",

					      "byte",

					      "iface",

					      "bus",

					      "core_mmss",

					      "pixel",

					      "core";



				phys = <&dsi1_phy>;

				phy-names = "dsi";

				status = "disabled";



				#address-cells = <1>;

				#size-cells = <0>;



				ports {

					#address-cells = <1>;

					#size-cells = <0>;



					port@0 {

						reg = <0>;

						dsi1_in: endpoint {

							remote-endpoint = <&mdp5_intf2_out>;

						};

					};



					port@1 {

						reg = <1>;

						dsi1_out: endpoint {

						};

					};

				};

			};



			dsi1_phy: dsi-phy@996400 {

				compatible = "qcom,dsi-phy-14nm";

				reg = <0x00996400 0x100>,

				      <0x00996500 0x300>,

				      <0x00996800 0x188>;

				reg-names = "dsi_phy",

					    "dsi_phy_lane",

					    "dsi_pll";



				#clock-cells = <1>;

				#phy-cells = <0>;



				clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_BB_CLK1>;

				clock-names = "iface", "ref";

				status = "disabled";

			};



			hdmi: hdmi-tx@9a0000 {

				compatible = "qcom,hdmi-tx-8996";

				reg =	<0x009a0000 0x50c>,