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Commit 25fabad2 authored by Sunil V L's avatar Sunil V L Committed by Anup Patel
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RISC-V: cpufreq: Add CPPC support 



CPPC registers can be implemented as architecture specific
FFH registers. Implement the FFH access routines for RISC-V
which use SBI CPPC extension.

Signed-off-by: default avatarSunil V L <sunilvl@ventanamicro.com>
parent d4451365
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