Commit 2226c894 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'omap-for-v5.12/dt-signed' of... 

Merge tag 'omap-for-v5.12/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

Devicetree changes for omaps for v5.12 merge window

This includes the following earlier patches that were considered too
late for v5.11 as discussed between Arnd and me on freenode #armlinux
in December:

- More updates to use cpsw switchdev driver

- Enable gta04 PMIC power management

- Updates for dra7 for ECC support, 1.8GHz speed and keep the
  ldo0 regulator always on as specified in the data manual

And then we have the new devicetree changes:

- Configure the original Amazon Echo to for audio

- Configure missing thermal interrupt for omap4430

- Configure mapphone devices for passive thermal cooling, and add
  1.2GHz mode.

- Correct omap4430 sgx clock rate to use the runtime Android kernel
  value, the earlier value was for a lower power operating point

- Drop turbo mode for 1GHz omap3 variants as we now have passive
  cooling configured

- Update email address for Javier

- Add new MYIR Tech Limited board support

* tag 'omap-for-v5.12/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am335x-myirtech-*: Add DT for AM335X MYIR Tech Limited board
  ARM: dts: omap3-igep: Change email address in copyright notice
  ARM: dts: omap36xx: Remove turbo mode for 1GHz variants
  ARM: dts: omap443x: Correct sgx clock to 307.2MHz as used on motorola vendor kernel
  ARM: dts: motorola-mapphone: Add 1.2GHz OPP
  ARM: dts: motorola-mapphone: Configure lower temperature passive cooling
  ARM: dts: Configure missing thermal interrupt for 4430
  ARM: dts: omap3-echo: Add speaker sound card support
  ARM: dts: dra71-evm: mark ldo0 regulator as always on
  ARM: dts: dra76x: add support for OPP_PLUS
  ARM: dts: am574x-idk: add support for EMIF1 ECC
  ARM: dts: omap3-gta04: fix twl4030-power settings
  ARM: dts: am335x-evm/evmsk/icev2: switch to new cpsw switch drv
  ARM: dts: am33xx-l4: add dt node for new cpsw switchdev driver

Link: https://lore.kernel.org/r/pull-1611845066-809577@atomide.com-2


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 86a24899 4231f3a7

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -817,6 +817,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \ 
	am335x-lxm.dtb \

	am335x-moxa-uc-2101.dtb \

	am335x-moxa-uc-8100-me-t.dtb \

	am335x-myirtech-myd.dtb \

	am335x-nano.dtb \

	am335x-netcan-plus-1xx.dtb \

	am335x-netcom-plus-2xx.dtb \

arch/arm/boot/dts/am335x-evm.dts

+8 −5
Original line number Diff line number Diff line
@@ -684,28 +684,31 @@ vmmc_reg: regulator@12 { 
	};

};



&mac {

&mac_sw {

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&cpsw_default>;

	pinctrl-1 = <&cpsw_sleep>;

	status = "okay";

	slaves = <1>;

};



&davinci_mdio {

&davinci_mdio_sw {

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&davinci_mdio_default>;

	pinctrl-1 = <&davinci_mdio_sleep>;

	status = "okay";



	ethphy0: ethernet-phy@0 {

		reg = <0>;

	};

};



&cpsw_emac0 {

&cpsw_port1 {

	phy-handle = <&ethphy0>;

	phy-mode = "rgmii-id";

	ti,dual-emac-pvid = <1>;

};



&cpsw_port2 {

	 status = "disabled";

};



&tscadc {

arch/arm/boot/dts/am335x-evmsk.dts

+6 −8
Original line number Diff line number Diff line
@@ -596,19 +596,17 @@ vmmc_reg: regulator@12 { 
	};

};



&mac {

&mac_sw {

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&cpsw_default>;

	pinctrl-1 = <&cpsw_sleep>;

	dual_emac = <1>;

	status = "okay";

};



&davinci_mdio {

&davinci_mdio_sw {

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&davinci_mdio_default>;

	pinctrl-1 = <&davinci_mdio_sleep>;

	status = "okay";



	ethphy0: ethernet-phy@0 {

		reg = <0>;
@@ -619,16 +617,16 @@ ethphy1: ethernet-phy@1 { 
	};

};



&cpsw_emac0 {

&cpsw_port1 {

	phy-handle = <&ethphy0>;

	phy-mode = "rgmii-id";

	dual_emac_res_vlan = <1>;

	ti,dual-emac-pvid = <1>;

};



&cpsw_emac1 {

&cpsw_port2 {

	phy-handle = <&ethphy1>;

	phy-mode = "rgmii-id";

	dual_emac_res_vlan = <2>;

	ti,dual-emac-pvid = <2>;

};



&mmc1 {

arch/arm/boot/dts/am335x-icev2.dts

+6 −8
Original line number Diff line number Diff line
@@ -474,31 +474,29 @@ p10 { 
	};

};



&cpsw_emac0 {

&cpsw_port1 {

	phy-handle = <&ethphy0>;

	phy-mode = "rmii";

	dual_emac_res_vlan = <1>;

	ti,dual-emac-pvid = <1>;

};



&cpsw_emac1 {

&cpsw_port2 {

	phy-handle = <&ethphy1>;

	phy-mode = "rmii";

	dual_emac_res_vlan = <2>;

	ti,dual-emac-pvid = <2>;

};



&mac {

&mac_sw {

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&cpsw_default>;

	pinctrl-1 = <&cpsw_sleep>;

	status = "okay";

	dual_emac;

};



&davinci_mdio {

&davinci_mdio_sw {

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&davinci_mdio_default>;

	pinctrl-1 = <&davinci_mdio_sleep>;

	status = "okay";

	reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;

	reset-delay-us = <2>;   /* PHY datasheet states 1uS min */

arch/arm/boot/dts/am335x-myirtech-myc.dtsi

0 → 100644
+267 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-or-later

/* SPDX-FileCopyrightText: Alexander Shiyan, <shc_work@mail.ru> */



/* Based on code by myc_c335x.dts, MYiRtech.com */

/* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ */



/dts-v1/;



#include "am33xx.dtsi"



#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/leds/common.h>



/ {

	model = "MYIR MYC-AM335X";

	compatible = "myir,myc-am335x", "ti,am33xx";



	cpus {

		cpu@0 {

			cpu0-supply = <&vdd_core>;

			voltage-tolerance = <2>;

		};

	};



	memory@80000000 {

		device_type = "memory";

		reg = <0x80000000 0x10000000>;

	};



	vdd_mod: vdd_mod_reg {

		compatible = "regulator-fixed";

		regulator-name = "vdd-mod";

		regulator-always-on;

		regulator-boot-on;

	};



	vdd_core: vdd_core_reg {

		compatible = "regulator-fixed";

		regulator-name = "vdd-core";

		regulator-always-on;

		regulator-boot-on;

		vin-supply = <&vdd_mod>;

	};



	leds: leds {

		compatible = "gpio-leds";

		pinctrl-names = "default";

		pinctrl-0 = <&led_mod_pins>;



		led_mod: led_mod {

			label = "module:user";

			gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;

			color = <LED_COLOR_ID_GREEN>;

			default-state = "off";

			panic-indicator;

		};

	};

};



&cpsw_emac0 {

	phy-handle = <&phy0>;

	phy-mode = "rgmii-id";

};



&davinci_mdio {

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&mdio_pins_default>;

	pinctrl-1 = <&mdio_pins_sleep>;

	status = "okay";



	phy0: ethernet-phy@4 {

		reg = <4>;

	};

};



&elm {

	status = "okay";

};



&gpmc {

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&nand_pins_default>;

	pinctrl-1 = <&nand_pins_sleep>;

	ranges = <0 0 0x8000000 0x1000000>;

	status = "okay";



	nand0: nand@0,0 {

		compatible = "ti,omap2-nand";

		reg = <0 0 4>;

		interrupt-parent = <&gpmc>;

		interrupts = <0 IRQ_TYPE_NONE>, <1 IRQ_TYPE_NONE>;

		nand-bus-width = <8>;

		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>;

		gpmc,device-width = <1>;

		gpmc,sync-clk-ps = <0>;

		gpmc,cs-on-ns = <0>;

		gpmc,cs-rd-off-ns = <44>;

		gpmc,cs-wr-off-ns = <44>;

		gpmc,adv-on-ns = <6>;

		gpmc,adv-rd-off-ns = <34>;

		gpmc,adv-wr-off-ns = <44>;

		gpmc,we-on-ns = <0>;

		gpmc,we-off-ns = <40>;

		gpmc,oe-on-ns = <0>;

		gpmc,oe-off-ns = <54>;

		gpmc,access-ns = <64>;

		gpmc,rd-cycle-ns = <82>;

		gpmc,wr-cycle-ns = <82>;

		gpmc,bus-turnaround-ns = <0>;

		gpmc,cycle2cycle-delay-ns = <0>;

		gpmc,clk-activation-ns = <0>;

		gpmc,wr-access-ns = <40>;

		gpmc,wr-data-mux-bus-ns = <0>;

		ti,elm-id = <&elm>;

		ti,nand-ecc-opt = "bch8";



		#address-cells = <1>;

		#size-cells = <1>;

	};

};



&i2c0 {

	pinctrl-names = "default", "gpio", "sleep";

	pinctrl-0 = <&i2c0_pins_default>;

	pinctrl-1 = <&i2c0_pins_gpio>;

	pinctrl-2 = <&i2c0_pins_sleep>;

	clock-frequency = <400000>;

	scl-gpios = <&gpio3 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio3 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";



	eeprom: eeprom@50 {

		compatible = "atmel,24c32";

		reg = <0x50>;

		pagesize = <32>;

		vcc-supply = <&vdd_mod>;

	};

};



&mac {

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&eth_slave1_pins_default>;

	pinctrl-1 = <&eth_slave1_pins_sleep>;

	slaves = <1>;

	status = "okay";

};



&rtc {

	system-power-controller;

};



&am33xx_pinmux {

	mdio_pins_default: pinmux_mdio_pins_default {

		pinctrl-single,pins = <

			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)	/* mdio_data */

			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)			/* mdio_clk */

		>;

	};



	mdio_pins_sleep: pinmux_mdio_pins_sleep {

		pinctrl-single,pins = <

			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)

		>;

	};



	eth_slave1_pins_default: pinmux_eth_slave1_pins_default {

		pinctrl-single,pins = <

			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)		/* rgmii1_tctl */

			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2)		/* rgmii1_rctl */

			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)		/* rgmii1_td3 */

			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)		/* rgmii1_td2 */

			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)		/* rgmii1_td1 */

			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)		/* rgmii1_td0 */

			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2)		/* rgmii1_tclk */

			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2)		/* rgmii1_rclk */

			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2)		/* rgmii1_rd3 */

			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2)		/* rgmii1_rd2 */

			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2)		/* rgmii1_rd1 */

			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2)		/* rgmii1_rd0 */

		>;

	};



	eth_slave1_pins_sleep: pinmux_eth_slave1_pins_sleep {

		pinctrl-single,pins = <

			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)

		>;

	};



	i2c0_pins_default: pinmux_i2c0_pins_default {

		pinctrl-single,pins = <

			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT | SLEWCTRL_FAST, MUX_MODE0)	/* I2C0_SDA */

			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT | SLEWCTRL_FAST, MUX_MODE0)	/* I2C0_SCL */

		>;

	};



	i2c0_pins_gpio: pinmux_i2c0_pins_gpio {

		pinctrl-single,pins = <

			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT, MUX_MODE7)			/* gpio3[5] */

			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT, MUX_MODE7)			/* gpio3[6] */

		>;

	};



	i2c0_pins_sleep: pinmux_i2c0_pins_sleep {

		pinctrl-single,pins = <

			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLDOWN, MUX_MODE7)

		>;

	};



	led_mod_pins: pinmux_led_mod_pins {

		pinctrl-single,pins = <

			AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE7)		/* gpio3[18] */

		>;

	};



	nand_pins_default: pinmux_nand_pins_default {

		pinctrl-single,pins = <

			AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0)		/* gpmc_ad0 */

			AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0)		/* gpmc_ad1 */

			AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0)		/* gpmc_ad2 */

			AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0)		/* gpmc_ad3 */

			AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0)		/* gpmc_ad4 */

			AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0)		/* gpmc_ad5 */

			AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)		/* gpmc_ad6 */

			AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)		/* gpmc_ad7 */

			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)		/* gpmc_wait0 */

			AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7)		/* gpio0[31] */

			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)			/* gpmc_csn0 */

			AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)			/* gpmc_advn_ale */

			AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)			/* gpmc_oen_ren */

			AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)			/* gpmc_wen */

			AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)			/* gpmc_be0n_cle */

		>;

	};



	nand_pins_sleep: pinmux_nand_pins_sleep {

		pinctrl-single,pins = <

			AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_INPUT_PULLDOWN, MUX_MODE7)

		>;

	};

};