Commit 21eeb051 authored by Taimur Hassan's avatar Taimur Hassan Committed by Alex Deucher
Browse files

drm/amd/display: Split pipe for stereo timings 



[Why & How]
DML2 did not carry over DML1 logic that splits pipe for stero timings. Pipe
splitting is needed in this case to pass stereo tests.

Reviewed-by: default avatarCharlene Liu <charlene.liu@amd.com>
Acked-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarQingqing Zhuo <Qingqing.Zhuo@amd.com>
Signed-off-by: default avatarTaimur Hassan <syed.hassan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1d93c4db

drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

+11 −0
Original line number Diff line number Diff line
@@ -708,6 +708,17 @@ bool dml2_map_dc_pipes(struct dml2_context *ctx, struct dc_state *state, const s 
					// If ODM combine is not inuse, then the number of pipes

					// per plane is determined by MPC combine factor

					scratch.mpc_info.mpc_factor = DPPPerSurface[plane_disp_cfg_index];



					//For stereo timings, we need to pipe split

					if ((state->streams[stream_index]->view_format ==

							VIEW_3D_FORMAT_SIDE_BY_SIDE ||

							state->streams[stream_index]->view_format ==

							VIEW_3D_FORMAT_TOP_AND_BOTTOM) &&

							(state->streams[stream_index]->timing.timing_3d_format ==

							TIMING_3D_FORMAT_TOP_AND_BOTTOM ||

							state->streams[stream_index]->timing.timing_3d_format ==

							TIMING_3D_FORMAT_SIDE_BY_SIDE))

						scratch.mpc_info.mpc_factor = 2;

				} else {

					// If ODM combine is enabled, then we use at most 1 pipe per

					// odm slice per plane, i.e. MPC combine is never used