Commit 21e67d4d authored by Harry Wentland's avatar Harry Wentland Committed by Alex Deucher
Browse files

drm/amd/display: No need to keep track of unreffed clk sources 



This simplifies clock source reprogramming a bit.

Signed-off-by: default avatarHarry Wentland <harry.wentland@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e74c6972

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

+2 −16
Original line number Diff line number Diff line
@@ -261,13 +261,12 @@ bool resource_construct( 
}





bool resource_unreference_clock_source(

void resource_unreference_clock_source(

		struct resource_context *res_ctx,

		const struct resource_pool *pool,

		struct clock_source *clock_source)

{

	int i;

	bool need_reset = false;



	for (i = 0; i < pool->clk_src_count; i++) {

		if (pool->clock_sources[i] != clock_source)
@@ -275,24 +274,11 @@ bool resource_unreference_clock_source( 


		res_ctx->clock_source_ref_count[i]--;



		if (res_ctx->clock_source_ref_count[i] == 0) {

			res_ctx->clock_source_changed[i] = true;

			need_reset = true;

		}



		break;

	}



	if (pool->dp_clock_source == clock_source) {

	if (pool->dp_clock_source == clock_source)

		res_ctx->dp_clock_source_ref_count--;



		if (res_ctx->dp_clock_source_ref_count == 0) {

			res_ctx->dp_clock_source_changed = true;

			need_reset = true;

		}

	}



	return need_reset;

}



void resource_reference_clock_source(

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

+5 −16
Original line number Diff line number Diff line
@@ -1640,6 +1640,8 @@ static void dce110_reset_hw_ctx_wrap( 


		if (!pipe_ctx->stream ||

				pipe_need_reprogram(pipe_ctx_old, pipe_ctx)) {

			struct clock_source *old_clk = pipe_ctx_old->clock_source;



			core_link_disable_stream(pipe_ctx_old);

			pipe_ctx_old->stream_res.tg->funcs->set_blank(pipe_ctx_old->stream_res.tg, true);

			if (!hwss_wait_for_blank_complete(pipe_ctx_old->stream_res.tg)) {
@@ -1650,27 +1652,14 @@ static void dce110_reset_hw_ctx_wrap( 
			pipe_ctx_old->plane_res.mi->funcs->free_mem_input(

					pipe_ctx_old->plane_res.mi, dc->current_state->stream_count);



			if (old_clk)

				old_clk->funcs->cs_power_down(old_clk);



			dc->hwss.power_down_front_end(dc, pipe_ctx_old->pipe_idx);



			pipe_ctx_old->stream = NULL;

		}

	}



	/* power down changed clock sources */

	for (i = 0; i < dc->res_pool->clk_src_count; i++)

		if (context->res_ctx.clock_source_changed[i]) {

			struct clock_source *clk = dc->res_pool->clock_sources[i];



			clk->funcs->cs_power_down(clk);

			context->res_ctx.clock_source_changed[i] = false;

		}



	if (context->res_ctx.dp_clock_source_changed) {

		struct clock_source *clk = dc->res_pool->dp_clock_source;



		clk->funcs->cs_power_down(clk);

		context->res_ctx.clock_source_changed[i] = false;

	}

}

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

+8 −17
Original line number Diff line number Diff line
@@ -1265,22 +1265,6 @@ static void reset_hw_ctx_wrap( 
			plane_atomic_power_down(dc, i);

	}



	/* power down changed clock sources */

	for (i = 0; i < dc->res_pool->clk_src_count; i++)

		if (context->res_ctx.clock_source_changed[i]) {

			struct clock_source *clk = dc->res_pool->clock_sources[i];



			clk->funcs->cs_power_down(clk);

			context->res_ctx.clock_source_changed[i] = false;

		}



	if (context->res_ctx.dp_clock_source_changed) {

		struct clock_source *clk = dc->res_pool->dp_clock_source;



		clk->funcs->cs_power_down(clk);

		context->res_ctx.dp_clock_source_changed = false;

	}



	/* Reset Back End*/

	for (i = dc->res_pool->pipe_count - 1; i >= 0 ; i--) {

		struct pipe_ctx *pipe_ctx_old =
@@ -1291,11 +1275,18 @@ static void reset_hw_ctx_wrap( 
			continue;



		if (!pipe_ctx->stream ||

				pipe_need_reprogram(pipe_ctx_old, pipe_ctx))

				pipe_need_reprogram(pipe_ctx_old, pipe_ctx)) {

			struct clock_source *old_clk = pipe_ctx_old->clock_source;



			reset_back_end_for_pipe(dc, pipe_ctx_old, dc->current_state);



			if (old_clk)

				old_clk->funcs->cs_power_down(old_clk);

		}

	}



}



static bool patch_address_for_sbs_tb_stereo(

		struct pipe_ctx *pipe_ctx, PHYSICAL_ADDRESS_LOC *addr)

{

drivers/gpu/drm/amd/display/dc/inc/core_types.h

+0 −2
Original line number Diff line number Diff line
@@ -213,9 +213,7 @@ struct resource_context { 
	bool is_stream_enc_acquired[MAX_PIPES * 2];

	bool is_audio_acquired[MAX_PIPES];

	uint8_t clock_source_ref_count[MAX_CLOCK_SOURCES];

	bool clock_source_changed[MAX_CLOCK_SOURCES];

	uint8_t dp_clock_source_ref_count;

	bool dp_clock_source_changed;

};



struct dce_bw_output {

drivers/gpu/drm/amd/display/dc/inc/resource.h

+1 −1
Original line number Diff line number Diff line
@@ -92,7 +92,7 @@ enum dc_status resource_build_scaling_params_for_context( 


void resource_build_info_frame(struct pipe_ctx *pipe_ctx);



bool resource_unreference_clock_source(

void resource_unreference_clock_source(

		struct resource_context *res_ctx,

		const struct resource_pool *pool,

		struct clock_source *clock_source);