Commit 1f1cb308 authored Dec 06, 2021 by Chris Packham Committed by Gregory CLEMENT Dec 17, 2021

arm/arm64: dts: Enable CP0 GPIOs for CN9130-CRB



Enable the CP0 GPIO devices for the CN9130-CRB. This is needed for a
number of the peripheral devices to function.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

parent fa55b7dc

arch/arm64/boot/dts/marvell/cn9130-crb.dtsi

+10 −0

Original line number	Diff line number	Diff line
		@@ -17,6 +17,8 @@ aliases {
		ethernet0 = &cp0_eth0;
		ethernet1 = &cp0_eth1;
		ethernet2 = &cp0_eth2;
		gpio1 = &cp0_gpio1;
		gpio2 = &cp0_gpio2;
		};

		memory@0 {
		@@ -114,6 +116,14 @@ cp0_spi0_pins: cp0-spi-pins-0 {
		};
		};

		&cp0_gpio1 {
		status = "okay";
		};

		&cp0_gpio2 {
		status = "okay";
		};

		&cp0_i2c0 {
		pinctrl-names = "default";
		pinctrl-0 = <&cp0_i2c0_pins>;