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Commit 1ae73f2f authored by Ben Skeggs's avatar Ben Skeggs
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drm/nvc0/pm: restrict pll mode to clocks that can actually use it 



Fixes reclocking failure on some chips where we attempted to set PDAEMON
to PLL mode.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 44ab8cc5
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