Commit 16145013 authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven
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clk: renesas: r9a07g044: Add OSTM clock and reset entries



Add OSTM{0,1,2} clock and reset entries to CPG driver.

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211110082019.28554-2-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent dc446cba
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