Commit 148f597d authored by Huang Rui's avatar Huang Rui Committed by Alex Deucher
Browse files

drm/amdgpu: use register distance member instead of hardcode in GMC9 



This patch updates to use register distance member instead of hardcode
in GMC9.

Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Tested-by: default avatarAnZhong Huang <anzhong.huang@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1f9d56c3

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

+25 −14
Original line number Diff line number Diff line
@@ -502,8 +502,8 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, 
	if (adev->gfx.kiq.ring.sched.ready &&

			(amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev)) &&

			!adev->in_gpu_reset) {

		uint32_t req = hub->vm_inv_eng0_req + eng;

		uint32_t ack = hub->vm_inv_eng0_ack + eng;

		uint32_t req = hub->vm_inv_eng0_req + hub->eng_distance * eng;

		uint32_t ack = hub->vm_inv_eng0_ack + hub->eng_distance * eng;



		amdgpu_virt_kiq_reg_write_reg_wait(adev, req, ack, inv_req,

						   1 << vmid);
@@ -523,7 +523,8 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, 
	if (use_semaphore) {

		for (j = 0; j < adev->usec_timeout; j++) {

			/* a read return value of 1 means semaphore acuqire */

			tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_sem + eng);

			tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_sem +

					    hub->eng_distance * eng);

			if (tmp & 0x1)

				break;

			udelay(1);
@@ -534,7 +535,8 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, 
	}



	do {

		WREG32_NO_KIQ(hub->vm_inv_eng0_req + eng, inv_req);

		WREG32_NO_KIQ(hub->vm_inv_eng0_req +

			      hub->eng_distance * eng, inv_req);



		/*

		 * Issue a dummy read to wait for the ACK register to
@@ -542,10 +544,12 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, 
		 * GRBM interface.

		 */

		if (vmhub == AMDGPU_GFXHUB_0)

			RREG32_NO_KIQ(hub->vm_inv_eng0_req + eng);

			RREG32_NO_KIQ(hub->vm_inv_eng0_req +

				      hub->eng_distance * eng);



		for (j = 0; j < adev->usec_timeout; j++) {

			tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_ack + eng);

			tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_ack +

					    hub->eng_distance * eng);

			if (tmp & (1 << vmid))

				break;

			udelay(1);
@@ -561,7 +565,8 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, 
		 * add semaphore release after invalidation,

		 * write with 0 means semaphore release

		 */

		WREG32_NO_KIQ(hub->vm_inv_eng0_sem + eng, 0);

		WREG32_NO_KIQ(hub->vm_inv_eng0_sem +

			      hub->eng_distance * eng, 0);



	spin_unlock(&adev->gmc.invalidate_lock);
@@ -676,16 +681,21 @@ static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring, 
	if (use_semaphore)

		/* a read return value of 1 means semaphore acuqire */

		amdgpu_ring_emit_reg_wait(ring,

					  hub->vm_inv_eng0_sem + eng, 0x1, 0x1);

					  hub->vm_inv_eng0_sem +

					  hub->eng_distance * eng, 0x1, 0x1);



	amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + (2 * vmid),

	amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 +

			      (hub->ctx_addr_distance * vmid),

			      lower_32_bits(pd_addr));



	amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + (2 * vmid),

	amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 +

			      (hub->ctx_addr_distance * vmid),

			      upper_32_bits(pd_addr));



	amdgpu_ring_emit_reg_write_reg_wait(ring, hub->vm_inv_eng0_req + eng,

					    hub->vm_inv_eng0_ack + eng,

	amdgpu_ring_emit_reg_write_reg_wait(ring, hub->vm_inv_eng0_req +

					    hub->eng_distance * eng,

					    hub->vm_inv_eng0_ack +

					    hub->eng_distance * eng,

					    req, 1 << vmid);



	/* TODO: It needs to continue working on debugging with semaphore for GFXHUB as well. */
@@ -694,7 +704,8 @@ static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring, 
		 * add semaphore release after invalidation,

		 * write with 0 means semaphore release

		 */

		amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_sem + eng, 0);

		amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_sem +

				      hub->eng_distance * eng, 0);



	return pd_addr;

}