Commit 0cb2a8f3 authored by Sergio Paracuellos's avatar Sergio Paracuellos Committed by Lorenzo Pieralisi
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PCI: mt7621: Delay phy ports initialization 

Some devices like ZBT WE1326 and ZBT WF3526-P and some Netgear models need
to delay phy port initialization after calling the mt7621_pcie_init_port()
driver function to get into reliable boots for both warm and hard resets.

The delay required to detect the ports seems to be in the range [75-100]
milliseconds.

If the ports are not detected the controller is not functional.

There is no datasheet or something similar to really understand why this
extra delay is needed only for these devices and it is not for most of
the boards that are built on mt7621 SoC.

This issue has been reported by openWRT community and the complete
discussion is in [0]. The 100 milliseconds delay has been tested in all
devices to validate it.

Add the extra 100 milliseconds delay to fix the issue.

[0]: https://github.com/openwrt/openwrt/pull/11220

Link: https://lore.kernel.org/r/20221231074041.264738-1-sergio.paracuellos@gmail.com


Fixes: 2bdd5238 ("PCI: mt7621: Add MediaTek MT7621 PCIe host controller driver")
Signed-off-by: default avatarSergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: default avatarLorenzo Pieralisi <lpieralisi@kernel.org>
parent 1b929c02

drivers/pci/controller/pcie-mt7621.c

+2 −0
Original line number Diff line number Diff line
@@ -60,6 +60,7 @@ 
#define PCIE_PORT_LINKUP		BIT(0)

#define PCIE_PORT_CNT			3



#define INIT_PORTS_DELAY_MS		100

#define PERST_DELAY_MS			100



/**
@@ -369,6 +370,7 @@ static int mt7621_pcie_init_ports(struct mt7621_pcie *pcie) 
		}

	}



	msleep(INIT_PORTS_DELAY_MS);

	mt7621_pcie_reset_ep_deassert(pcie);



	tmp = NULL;