Loading arch/mips/include/asm/mach-ath25/dma-coherence.h +4 −0 Original line number Diff line number Diff line Loading @@ -69,4 +69,8 @@ static inline int plat_device_is_coherent(struct device *dev) #endif } static inline void plat_post_dma_flush(struct device *dev) { } #endif /* __ASM_MACH_ATH25_DMA_COHERENCE_H */ arch/mips/include/asm/mach-bmips/dma-coherence.h +4 −0 Original line number Diff line number Diff line Loading @@ -45,4 +45,8 @@ static inline int plat_device_is_coherent(struct device *dev) return 0; } static inline void plat_post_dma_flush(struct device *dev) { } #endif /* __ASM_MACH_BMIPS_DMA_COHERENCE_H */ arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h +4 −0 Original line number Diff line number Diff line Loading @@ -57,6 +57,10 @@ static inline int plat_device_is_coherent(struct device *dev) return 1; } static inline void plat_post_dma_flush(struct device *dev) { } dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr); phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr); Loading arch/mips/include/asm/mach-generic/dma-coherence.h +4 −0 Original line number Diff line number Diff line Loading @@ -52,6 +52,10 @@ static inline int plat_device_is_coherent(struct device *dev) return coherentio; } static inline void plat_post_dma_flush(struct device *dev) { } #ifdef CONFIG_SWIOTLB static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) { Loading arch/mips/include/asm/mach-ip27/dma-coherence.h +4 −0 Original line number Diff line number Diff line Loading @@ -58,6 +58,10 @@ static inline int plat_dma_supported(struct device *dev, u64 mask) return 1; } static inline void plat_post_dma_flush(struct device *dev) { } static inline int plat_device_is_coherent(struct device *dev) { return 1; /* IP27 non-cohernet mode is unsupported */ Loading Loading
arch/mips/include/asm/mach-ath25/dma-coherence.h +4 −0 Original line number Diff line number Diff line Loading @@ -69,4 +69,8 @@ static inline int plat_device_is_coherent(struct device *dev) #endif } static inline void plat_post_dma_flush(struct device *dev) { } #endif /* __ASM_MACH_ATH25_DMA_COHERENCE_H */
arch/mips/include/asm/mach-bmips/dma-coherence.h +4 −0 Original line number Diff line number Diff line Loading @@ -45,4 +45,8 @@ static inline int plat_device_is_coherent(struct device *dev) return 0; } static inline void plat_post_dma_flush(struct device *dev) { } #endif /* __ASM_MACH_BMIPS_DMA_COHERENCE_H */
arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h +4 −0 Original line number Diff line number Diff line Loading @@ -57,6 +57,10 @@ static inline int plat_device_is_coherent(struct device *dev) return 1; } static inline void plat_post_dma_flush(struct device *dev) { } dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr); phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr); Loading
arch/mips/include/asm/mach-generic/dma-coherence.h +4 −0 Original line number Diff line number Diff line Loading @@ -52,6 +52,10 @@ static inline int plat_device_is_coherent(struct device *dev) return coherentio; } static inline void plat_post_dma_flush(struct device *dev) { } #ifdef CONFIG_SWIOTLB static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) { Loading
arch/mips/include/asm/mach-ip27/dma-coherence.h +4 −0 Original line number Diff line number Diff line Loading @@ -58,6 +58,10 @@ static inline int plat_dma_supported(struct device *dev, u64 mask) return 1; } static inline void plat_post_dma_flush(struct device *dev) { } static inline int plat_device_is_coherent(struct device *dev) { return 1; /* IP27 non-cohernet mode is unsupported */ Loading