Loading arch/arm64/boot/dts/nvidia/tegra234.dtsi +53 −0 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> #include <dt-bindings/power/tegra234-powergate.h> #include <dt-bindings/reset/tegra234-reset.h> #include <dt-bindings/thermal/tegra234-bpmp-thermal.h> / { compatible = "nvidia,tegra234"; Loading Loading @@ -3027,6 +3028,11 @@ bpmp_i2c: i2c { #address-cells = <1>; #size-cells = <0>; }; bpmp_thermal: thermal { compatible = "nvidia,tegra186-bpmp-thermal"; #thermal-sensor-cells = <1>; }; }; cpus { Loading Loading @@ -3517,6 +3523,53 @@ sound { <&bpmp TEGRA234_CLK_PLLA_OUT0>; }; thermal-zones { cpu-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CPU>; status = "disabled"; }; gpu-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_GPU>; status = "disabled"; }; cv0-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV0>; status = "disabled"; }; cv1-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV1>; status = "disabled"; }; cv2-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV2>; status = "disabled"; }; soc0-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC0>; status = "disabled"; }; soc1-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC1>; status = "disabled"; }; soc2-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC2>; status = "disabled"; }; tj-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_TJ_MAX>; status = "disabled"; }; }; timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, Loading include/dt-bindings/thermal/tegra234-bpmp-thermal.h 0 → 100644 +19 −0 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0 */ /* * This header provides constants for binding nvidia,tegra234-bpmp-thermal. */ #ifndef _DT_BINDINGS_THERMAL_TEGRA234_BPMP_THERMAL_H #define _DT_BINDINGS_THERMAL_TEGRA234_BPMP_THERMAL_H #define TEGRA234_BPMP_THERMAL_ZONE_CPU 0 #define TEGRA234_BPMP_THERMAL_ZONE_GPU 1 #define TEGRA234_BPMP_THERMAL_ZONE_CV0 2 #define TEGRA234_BPMP_THERMAL_ZONE_CV1 3 #define TEGRA234_BPMP_THERMAL_ZONE_CV2 4 #define TEGRA234_BPMP_THERMAL_ZONE_SOC0 5 #define TEGRA234_BPMP_THERMAL_ZONE_SOC1 6 #define TEGRA234_BPMP_THERMAL_ZONE_SOC2 7 #define TEGRA234_BPMP_THERMAL_ZONE_TJ_MAX 8 #endif Loading
arch/arm64/boot/dts/nvidia/tegra234.dtsi +53 −0 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> #include <dt-bindings/power/tegra234-powergate.h> #include <dt-bindings/reset/tegra234-reset.h> #include <dt-bindings/thermal/tegra234-bpmp-thermal.h> / { compatible = "nvidia,tegra234"; Loading Loading @@ -3027,6 +3028,11 @@ bpmp_i2c: i2c { #address-cells = <1>; #size-cells = <0>; }; bpmp_thermal: thermal { compatible = "nvidia,tegra186-bpmp-thermal"; #thermal-sensor-cells = <1>; }; }; cpus { Loading Loading @@ -3517,6 +3523,53 @@ sound { <&bpmp TEGRA234_CLK_PLLA_OUT0>; }; thermal-zones { cpu-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CPU>; status = "disabled"; }; gpu-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_GPU>; status = "disabled"; }; cv0-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV0>; status = "disabled"; }; cv1-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV1>; status = "disabled"; }; cv2-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV2>; status = "disabled"; }; soc0-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC0>; status = "disabled"; }; soc1-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC1>; status = "disabled"; }; soc2-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC2>; status = "disabled"; }; tj-thermal { thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_TJ_MAX>; status = "disabled"; }; }; timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, Loading
include/dt-bindings/thermal/tegra234-bpmp-thermal.h 0 → 100644 +19 −0 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0 */ /* * This header provides constants for binding nvidia,tegra234-bpmp-thermal. */ #ifndef _DT_BINDINGS_THERMAL_TEGRA234_BPMP_THERMAL_H #define _DT_BINDINGS_THERMAL_TEGRA234_BPMP_THERMAL_H #define TEGRA234_BPMP_THERMAL_ZONE_CPU 0 #define TEGRA234_BPMP_THERMAL_ZONE_GPU 1 #define TEGRA234_BPMP_THERMAL_ZONE_CV0 2 #define TEGRA234_BPMP_THERMAL_ZONE_CV1 3 #define TEGRA234_BPMP_THERMAL_ZONE_CV2 4 #define TEGRA234_BPMP_THERMAL_ZONE_SOC0 5 #define TEGRA234_BPMP_THERMAL_ZONE_SOC1 6 #define TEGRA234_BPMP_THERMAL_ZONE_SOC2 7 #define TEGRA234_BPMP_THERMAL_ZONE_TJ_MAX 8 #endif