Commit 0878fd86 authored Aug 21, 2023 by Chris Packham Committed by Gregory CLEMENT Sep 20, 2023

ARM64: dts: marvell: cn9310: Use appropriate label for spi1 pins

Both the CN9130-CRB and CN9130-DB use the SPI1 interface but had the
pinctrl node labelled as "cp0_spi0_pins". Use the label "cp0_spi1_pins"
and update the node name to "cp0-spi-pins-1" to avoid confusion with the
pinctrl options for SPI0.

Fixes: 4c43a41e ("arm64: dts: cn913x: add device trees for topology B boards")
Fixes: 5c0ee547 ("arm64: dts: add support for Marvell cn9130-crb platform")
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

parent 0bb80ecc

arch/arm64/boot/dts/marvell/cn9130-crb.dtsi

+2 −2

Original line number	Diff line number	Diff line
		@@ -120,7 +120,7 @@ cp0_sdhci_pins: cp0-sdhi-pins-0 {
		"mpp59", "mpp60", "mpp61";
		marvell,function = "sdio";
		};
		cp0_spi0_pins: cp0-spi-pins-0 {
		cp0_spi1_pins: cp0-spi-pins-1 {
		marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
		marvell,function = "spi1";
		};
		@@ -170,7 +170,7 @@ &cp0_sdhci0 {

		&cp0_spi1 {
		pinctrl-names = "default";
		pinctrl-0 = <&cp0_spi0_pins>;
		pinctrl-0 = <&cp0_spi1_pins>;
		reg = <0x700680 0x50>, /* control */
		<0x2000000 0x1000000>; /* CS0 */
		status = "okay";

arch/arm64/boot/dts/marvell/cn9130-db.dtsi

+2 −2

Original line number	Diff line number	Diff line
		@@ -307,7 +307,7 @@ &cp0_sdhci0 {
		&cp0_spi1 {
		status = "disabled";
		pinctrl-names = "default";
		pinctrl-0 = <&cp0_spi0_pins>;
		pinctrl-0 = <&cp0_spi1_pins>;
		reg = <0x700680 0x50>;

		flash@0 {
		@@ -371,7 +371,7 @@ cp0_sdhci_pins: cp0-sdhi-pins-0 {
		"mpp59", "mpp60", "mpp61";
		marvell,function = "sdio";
		};
		cp0_spi0_pins: cp0-spi-pins-0 {
		cp0_spi1_pins: cp0-spi-pins-1 {
		marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
		marvell,function = "spi1";
		};