Commit 07f9cfe2 authored by Imre Deak's avatar Imre Deak
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drm/i915/dp_mst: Make sure pbn_div is up-to-date after sink reconnect



Atm the MST encoder config computation may use an out-of-date pbn_div
value, if the sink is unplugged and a sink is replugged with different
link rate/lane count capabilities. The current way of reinitializing
pbn_div depends on pbn_div getting cleared via intel_atomic_check() ->
drm_dp_mst_atomic_check() ->
drm_dp_mst_atomic_check_payload_alloc_limits(), however the clearing
won't happen if the sink got unplugged (and hence
drm_dp_mst_topology_mgr::mst_state being false).

To fix the above, simply update pbn_div unconditionally during config
computation, making pbn_div always match the link rate and lane count.

Cc: Lyude Paul <lyude@redhat.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230929154929.343947-1-imre.deak@intel.com
parent cf37c097
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+3 −6
Original line number Diff line number Diff line
@@ -94,12 +94,9 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
	crtc_state->lane_count = limits->max_lane_count;
	crtc_state->port_clock = limits->max_rate;

	// TODO: Handle pbn_div changes by adding a new MST helper
	if (!mst_state->pbn_div) {
	mst_state->pbn_div = drm_dp_get_vc_payload_bw(&intel_dp->mst_mgr,
						      crtc_state->port_clock,
						      crtc_state->lane_count);
	}

	for (bpp = max_bpp; bpp >= min_bpp; bpp -= step) {
		drm_dbg_kms(&i915->drm, "Trying bpp %d\n", bpp);