Commit 059289b2 authored by Pawel Moll's avatar Pawel Moll
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ARM: vexpress: Add Device Tree for V2P-CA15 core tile (TC1 variant)



This patch adds Device Tree file for the CoreTile Express A15x2
(V2P-CA15) with Test Chip 1.

As the chip's GIC has 160 interrupt inputs and equivalent SMM
(FPGA) has GIC synthesised with 256 interrupts, NR_IRQS is
increased.

Signed-off-by: default avatarPawel Moll <pawel.moll@arm.com>
parent cca070a9
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