Commit 0591ee6a authored by Vinay Belgaumkar's avatar Vinay Belgaumkar Committed by Ramalingam C
Browse files

drm/i915/guc/slpc: Use wrapper for reading RP_STATE_CAP 



This will ensure correct values for Gen12+ platforms.

v2: Rebase

Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarVinay Belgaumkar <vinay.belgaumkar@intel.com>
Signed-off-by: default avatarRamalingam C <ramalingam.c@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220216181504.7155-1-vinay.belgaumkar@intel.com
parent 9648f1c3

drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c

+3 −2
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
#include "i915_drv.h"

#include "intel_guc_slpc.h"

#include "gt/intel_gt.h"

#include "gt/intel_rps.h"



static inline struct intel_guc *slpc_to_guc(struct intel_guc_slpc *slpc)

{
@@ -574,10 +575,10 @@ static int slpc_use_fused_rp0(struct intel_guc_slpc *slpc) 


static void slpc_get_rp_values(struct intel_guc_slpc *slpc)

{

	struct intel_rps *rps = &slpc_to_gt(slpc)->rps;

	u32 rp_state_cap;



	rp_state_cap = intel_uncore_read(slpc_to_gt(slpc)->uncore,

					 GEN6_RP_STATE_CAP);

	rp_state_cap = intel_rps_read_state_cap(rps);



	slpc->rp0_freq = REG_FIELD_GET(RP0_CAP_MASK, rp_state_cap) *

					GT_FREQUENCY_MULTIPLIER;