- Feb 02, 2019
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Edward Wang authored
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- Feb 01, 2019
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Jack Koenig authored
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- Oct 09, 2018
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Jack Koenig authored
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Jack Koenig authored
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- Oct 05, 2018
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Jack Koenig authored
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Jack Koenig authored
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Jack Koenig authored
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- Jul 07, 2018
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Jim Lawson authored
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Jim Lawson authored
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- Jul 06, 2018
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Richard Lin authored
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- Jul 05, 2018
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Richard Lin authored
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Richard Lin authored
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Richard Lin authored
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Jack Koenig authored
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ducky authored
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ducky authored
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ducky authored
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ducky authored
binding => topBinding so that partial Bundles work and undefined Bundle members properly forward to DontCareBinding
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ducky authored
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Richard Lin authored
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Richard Lin authored
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chick authored
This shows errors comparing literals
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ducky authored
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ducky authored
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ducky authored
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ducky authored
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ducky authored
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ducky authored
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Richard Lin authored
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Richard Lin authored
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Richard Lin authored
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ducky authored
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ducky authored
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- Jul 03, 2018
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Jack Koenig authored
Provide direct conversion from ChiselIR to FIRRTL. Provide Driver support for dumping ProtoBuf.
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- Jun 30, 2018
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Jack Koenig authored
Resolves #841
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Schuyler Eldridge authored
Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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- Jun 28, 2018
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Jim Lawson authored
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- Jun 26, 2018
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Brendan Sweeney authored
Documentation for example had parameters in wrong order, and was missing @param. Additionally, it was lacking a module wrapper. This has been corrected.
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- Jun 21, 2018
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Jack Koenig authored
Add chisel3.experimental.IO for programmatic port creation in Raw and MultiIOModules. suggestName is required to name ports that cannot be named by reflection. Two ports cannot be given the same name.
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- Jun 19, 2018
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Wesley W. Terpstra authored
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