- Feb 14, 2020
-
-
Adam Izraelevitz authored
-
Adam Izraelevitz authored
-
Adam Izraelevitz authored
-
Adam Izraelevitz authored
-
Adam Izraelevitz authored
-
Adam Izraelevitz authored
-
Adam Izraelevitz authored
-
Adam Izraelevitz authored
-
Adam Izraelevitz authored
-
Sequencer authored
* add mill build * add gitignore and mill version
-
- Feb 13, 2020
-
-
Jack Koenig authored
-
- Feb 12, 2020
-
-
Jack Koenig authored
Co-authored-by:Schuyler Eldridge <schuyler.eldridge@gmail.com>
-
Jim Lawson authored
-
- Feb 11, 2020
-
-
Edward Wang authored
Close #1134
-
Jack Koenig authored
Co-authored-by:
Megan Wachs <megan@sifive.com> Co-authored-by:
mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
-
- Feb 09, 2020
-
-
Martin Schoeberl authored
-
- Feb 07, 2020
-
-
Schuyler Eldridge authored
Emit FIRRTL andr, orr for Bits.{andR, orR}
-
- Feb 06, 2020
-
-
Schuyler Eldridge authored
Change the emission strategy for Bits methods andR and orR to emit FIRRTL bitwise reduce operations andr and orr. Add two tests that assert the correct behavior of these operations in BitwiseOpsSpec. Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
-
Schuyler Eldridge authored
Adds additional Scaldoc to the RegNext object that (1) indicates that the width is not set and (2) shows an example of how to construct a RegNext-like construct with a set width. Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
-
- Feb 04, 2020
-
-
Albert Magyar authored
* Add support for readUnderWrite to SyncReadMem * Add write collision behavior test to MemorySpec * Update constant names
-
Chick Markley authored
Add method asBool to Clock.
-
- Feb 01, 2020
-
-
Chick Markley authored
-
- Jan 25, 2020
-
-
Leway Colin authored
Co-authored-by:
Jim Lawson <ucbjrl@berkeley.edu> Co-authored-by:
mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
-
Leway Colin authored
* Remove redundancy code * Remove blank line * BitPat supports whitespace and underscores, presumably for human readability. The BitPat.parse factory though did not remove these from the returned count. This fixes that adds whitespace and underscores to the unit tests This is an updated vesion of Chisel PR #1069 Co-authored-by:
Chick Markley <chick@qrhino.com> Co-authored-by:
Jim Lawson <ucbjrl@berkeley.edu> Co-authored-by:
mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
-
- Jan 24, 2020
-
-
Chick Markley authored
Provides Double and BigDecimal methods to access literal values for FixedPoint and Interval
-
Jim Lawson authored
Co-authored-by:Chick Markley <chick@qrhino.com>
-
- Jan 23, 2020
-
-
Jim Lawson authored
-
Chick Markley authored
-
Chick Markley authored
-
Schuyler Eldridge authored
* Change when thunks return type to Any Changes the type of the thunk for when and WhenContext methods from call-by-name Unit to call-by-name Any. This prevents a warning (-Ywarn-value-discard) where a when thunk is returning something other than Unit that is then discarded, e.g., another WhenContext. Signed-off-by:
Schuyler Eldridge <schuyler.eldridge@ibm.com> * Change switch thunk return to type to Any Changes the type of switch thunks from call-by-name Unit to call-by-name Any. This prevents a warning (-Ywarn-value-discard) when the internals of a switch block return something other than Unit which is then discarded. Signed-off-by:
Schuyler Eldridge <schuyler.eldridge@ibm.com>
-
- Jan 22, 2020
-
-
chick authored
# Conflicts: # src/test/scala/chiselTests/IntervalSpec.scala
-
Jim Lawson authored
-
Chick Markley authored
BitPat supports whitespace and underscores
-
Chick Markley authored
Non-functional, must have been a typo
-
Jim Lawson authored
-
Jim Lawson authored
-
- Jan 21, 2020
-
-
Deborah Soung authored
-
- Jan 18, 2020
-
-
Adam Izraelevitz authored
-
- Jan 08, 2020
-
-
Jim Lawson authored
-
Jim Lawson authored
-