Commits · ff6dfecf42560ed2e2eb678adc9ca8d868a472bd · github.com / freechipsproject / chisel3

Aug 04, 2015
- Changed name mangling to use _ as a delin. Fixed bug in checking for · ff6dfecf
  azidar authored Aug 03, 2015
```
invalid <> assignments.
```
  ff6dfecf
- Added concrete syntax for EmptyStmt() · ec3bf6a6
  azidar authored Aug 03, 2015
  
  ec3bf6a6
- Fixed performance bug in Split Expressions. Changed delin for connect indexed.... · 6f098fb5
  azidar authored Aug 03, 2015
```
Fixed performance bug in Split Expressions. Changed delin for connect indexed. Fixed various broken tests.
```
  6f098fb5
Aug 01, 2015
- Fixed (?) resolve genders pass · 342e7760
  azidar authored Jul 31, 2015
  
  342e7760
- Reading from output ports no longer causes errors · fb625a03
  azidar authored Jul 31, 2015
  
  fb625a03
- Fixed inferred type of bits and bit · c39fec52
  azidar authored Jul 31, 2015
  
  c39fec52
- Fixed compiletime error, whooops · 60a254b0
  azidar authored Jul 31, 2015
  
  60a254b0
- Allow bit operations on sints · 612d59c1
  azidar authored Jul 31, 2015
  
  612d59c1
- Added errors for bulk connects where field names match but types/flips don't · ba55a55e
  azidar authored Jul 31, 2015
  
  ba55a55e
- Merge branch 'master' of github.com:ucb-bar/firrtl · 0fc3314e
  azidar authored Jul 31, 2015
  
  0fc3314e
- Updated tests to pipe from stderr to stdout · d5cc3210
  azidar authored Jul 31, 2015
  
  d5cc3210
- Merge pull request #12 from ucb-bar/make-deps · 920e0778
  Adam Izraelevitz authored Jul 31, 2015
```
Fix makefile dependences so make -j doesn't fail
```
  920e0778
Jul 31, 2015
- Added module name to error messages. · 2440b824
  azidar authored Jul 30, 2015
  
  2440b824
- Merge branch 'new-low-firrtl' · 30d3b509
  azidar authored Jul 30, 2015
  
  30d3b509
- Merge branch 'new-low-firrtl' of github.com:ucb-bar/firrtl into new-low-firrtl · 57cbcce6
  azidar authored Jul 30, 2015
  
  57cbcce6
- Updated error and feature tests. Fixed bug in detecting incorrect genders · 4264d0c1
  azidar authored Jul 30, 2015
  
  4264d0c1
- Added eqv for bitwise equality, and change eq to be arithmetic equality · a2f3ac70
  azidar authored Jul 30, 2015
  
  a2f3ac70
- Added primitive linking to firrtl-test-main · d9bb4432
  azidar authored Jul 30, 2015
  
  d9bb4432
- Started adding linking support · 21d30b30
  azidar authored Jul 30, 2015
  
  21d30b30
- Updated lots of tests so they pass. Found one bug in expand whens · 9b2f96b8
  azidar authored Jul 30, 2015
  
  9b2f96b8
Jul 30, 2015
- Merge branch 'master' of github.com:ucb-bar/firrtl · d075e52e
  azidar authored Jul 29, 2015
  
  d075e52e
- Updated frontend changes · c442fe67
  azidar authored Jul 29, 2015
  
  c442fe67
- Added installation for linux · 55b8534d
  Adam Izraelevitz authored Jul 29, 2015
  
  55b8534d
- Merge branch 'master' of github.com:ucb-bar/firrtl into new-low-firrtl · c8e06e9b
  azidar authored Jul 29, 2015
  
  c8e06e9b
- Fix makefile dependences so make -j doesn't fail · 8a78c1cd
  Andrew Waterman authored Jul 29, 2015
  
  8a78c1cd
- Added linux zip · c8196b01
  Adam Izraelevitz authored Jul 29, 2015
  
  c8196b01
- Finished supporting Chisel 2.0 Ref Chip · 7646c2e3
  Adam Izraelevitz authored Jul 29, 2015
  
  7646c2e3
- Add bigint support. · 6ce20db7
  Adam Izraelevitz authored Jul 29, 2015
  
  6ce20db7
Jul 29, 2015
- Integrated bigint. Mostly works, but getting "cast" error for make Test. · 0c7aca56
  Adam Izraelevitz authored Jul 28, 2015
  
  0c7aca56
Jul 24, 2015
- Updated spec · e4552dcb
  azidar authored Jul 23, 2015
  
  e4552dcb
Jul 23, 2015
- Fixed verilog so it emits non-random inital values. Changed Not to be · 69e4bc2c
  Adam Izraelevitz authored Jul 22, 2015
```
correct.
```
  69e4bc2c
- Minor updates to spec · 96527dad
  azidar authored Jul 22, 2015
  
  96527dad
Jul 22, 2015
- Firrtl generates verilog that compiles, but does not work · 5fadf121
  Adam Izraelevitz authored Jul 21, 2015
  
  5fadf121
- Fixed bug in fix :P · 86dfd891
  azidar authored Jul 21, 2015
  
  86dfd891
- Fixed removing non-referenced components · 306206f0
  azidar authored Jul 21, 2015
  
  306206f0
- Merge branch 'new-low-firrtl' of github.com:ucb-bar/firrtl into new-low-firrtl · d1c11b61
  azidar authored Jul 21, 2015
  
  d1c11b61
- Updated TODO · c093b68d
  azidar authored Jul 21, 2015
  
  c093b68d
- Made things go faster. Still in progress. Expand when now removes · c69a4573
  Adam Izraelevitz authored Jul 21, 2015
```
non-referenced declarations that are not instances, but it doesn't work
right now.
```
  c69a4573
Jul 18, 2015

Datapath compiles with Chisel 2.0 -> FIRRTL -> Verilog! · 70567d4d

Adam Izraelevitz authored Jul 17, 2015

Had to separate initialization check pass
Need to write dead code elimination pass
Added LongWidth to support dshl that are huge

70567d4d

Jul 17, 2015
- Merge branch 'new-low-firrtl' of github.com:ucb-bar/firrtl into new-low-firrtl · 98bb81d9
  azidar authored Jul 16, 2015
```
Conflicts:
	src/main/stanza/firrtl-ir.stanza
	src/main/stanza/passes.stanza
	src/main/stanza/verilog.stanza
```
  98bb81d9