- May 05, 2015
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Adam Izraelevitz authored
firrtl + flo now working with tutorial examples
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azidar authored
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azidar authored
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- May 03, 2015
- May 02, 2015
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jackbackrack authored
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azidar authored
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azidar authored
Fixed performance bug where PlusWidth, MinusWidth, and ExpWidth could be simplified earlier, and also now have equal? defined so mMaxWidth doesn't blow up during width inference
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jackbackrack authored
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jackbackrack authored
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azidar authored
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- May 01, 2015
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jackbackrack authored
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azidar authored
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jackbackrack authored
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jackbackrack authored
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azidar authored
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- Apr 30, 2015
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jackbackrack authored
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jackbackrack authored
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jackbackrack authored
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azidar authored
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azidar authored
Made temp name generation counter, as well as the name, based off the eventual named assignment. Should be very clear what caused the generation of the temp, and the numbering is based off of that cause, not a global counter
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azidar authored
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jackbackrack authored
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jackbackrack authored
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azidar authored
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- Apr 29, 2015
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jackbackrack authored
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azidar authored
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azidar authored
Instances are now male. Reworked lowering pass to be sane. chisel3/ModuleVec.fir doesn't work because incorrecly generated?
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- Apr 28, 2015
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jackbackrack authored
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jackbackrack authored
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azidar authored
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azidar authored
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- Apr 27, 2015
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jackbackrack authored
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jackbackrack authored
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- Apr 25, 2015