- Rename Alias to Node to match FIRRTL notion
- Remove poorly-named Immediate and replace root of hierarchy with Arg

Emit read-enables as mux(ren, addr, poison).

Use the companion objects instead.

Now, we emit all I/Os inside a bundle named io.

A mangled name may itself conflict with another name.

No need for Option, since an empty Set can be used instead.

Read enables and read-write ports aren't working yet.

The fix is to propagate the flip to the fields in the bundle.

Scaladoc - 'when' and Utils

Just like Reg, state elements are not Data.

import relevant scaladoc from chisel(2).

This reduces FIRRTL output substantially for e.g. multicore designs.