Co-authored-by: sinofp <sinofp@tuta.io>

Co-authored-by: sinofp <sinofp@tuta.io>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

* remove firrtl.Utils.get_flip.

* remove firrtl.Utils.indent.

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

* Update scala-parallel-collections to 1.0.4

* Update scala-parallel-collections to 1.0.4

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

* Update sbt-scalafix to 0.9.32

* Update scala-library, scala-reflect to 2.13.7

* Add option to disable random mem/reg init

Co-authored-by: Jiuyang Liu <liu@jiuyang.me>

* fix for code review.

Co-authored-by: SharzyL <me@sharzy.in>

An application like barstools may contain a main that loads an annotations file containing
annotation classes that are not on it's classpath. This change allows unknown annotations
to be preserved by wrapping them in a UnrecognizedAnnotation. If annotations are then output
to a file, they will be unwrapped during serialization
This feature can be enabled via an AllowUnrecognizedAnnotations annotation

Co-authored-by: chick <chick.markley@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>

Add defname, parameter to extmodule spec, NFC

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

We never tested the case where the width of the
numerator was less than the denominator.
This should fix any issue with this combination.

+ correct the Error Info of "At least one dedupable annotation..."

Reset, AsyncReset, Interval, attach, assert, assume, and cover have all
been added as keywords but not added to the allowlist for parsing as
ids.

Hotfix for Vector Reg Init LegalizeConnects Bug

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

Add a private pass, LegalizeConnectsOnly, that behaves like
LegalizeConnects, but only pads connects instead of connects and
register inits.  Padding is necessary for ReplSeqMem, but ReplSeqMem
runs before LowerTypes and vector registers can still exist at this
point.  Connects, conversely, are all blown out by ExpandConnects and
can be safely, blindly treated as ground type.

Fixes #2379.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

* Demonstrate a couple failing cases

* Have TopWiring ignore unnamed declarations as potential sources

* Have Flatten & InlineInstances remove their annotations

* Format

* Added RTLIL Backend.

* Add test for Rtlil Backend, fix per-module file emission, scalafmt, and apply bugfixes for inconsistencies found during testing.

* Fix build on scala 2.13

* Add additional equivalence test, make some bugfixes and perf opts to the emitter.

* Final changes as requested by Kevin, code cleanup, add support for formal cells.