- Feb 06, 2019
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Schuyler Eldridge authored
This adds runs of the minimum Verilog compiler and SystemVerilog compiler in DriverSpec. Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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Schuyler Eldridge authored
This adds "mverilog" to the "--compiler" command line option. This will run the MinimumVerilogCompiler. This additionally fixes the MinimumVerilogCompiler such that DeadCodeElimination will not be run (it's not supposed to be). This is done by adding a MinimumVerilogEmitter, subclassing VerilogVerilog, that strips the DeadCodeElimination step from its parent. Additionally, BlackBoxSourceHelper is removed from the MinimumVerilogCompiler since this will be run by the VerilogEmitter already. Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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Andrew Waterman authored
* Enhance constant propagation across registers * Add more elaborate test case for register const prop
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- Feb 05, 2019
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Albert Magyar authored
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- Feb 02, 2019
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Schuyler Eldridge authored
This avoids an apparent problem somewhere in sbt and/or scalatest where the JVM runs out of metaspace if you repeatedly run tasks. This is an annoyance for FIRRTL developers or users that keep an sbt session open. This kludges around that by forking all tasks into a separate JVM. Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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Albert Magyar authored
* Add memory WRef factory for completeness * Refactor DefAnnotatedMemory construction for clarity
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- Feb 01, 2019
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Jack Koenig authored
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Albert Magyar authored
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- Jan 29, 2019
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Sequencer authored
make more clear for ExecutionOptionsManager log level settings.
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- Jan 27, 2019
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Jim Lawson authored
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- Jan 24, 2019
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Andrew Waterman authored
* Improve Shl codegen; eliminate Shlw WIR node If we emit shl(x, k) as {x, k'h0} instead of (x << k), then there's no need for Verilog-specific padding in the PadWidths pass. Avoiding the redundant padding improves compiler/simulator performance and renders Shlw unnecessary. * [skip formal checks] Add test
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- Jan 23, 2019
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David Biancolin authored
[Top Wiring] Expand top wiring to work on aggregates
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David Biancolin authored
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Jim Lawson authored
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Jim Lawson authored
* Remove GhpagesPlugin. (#979) * Restore old SCM reference (after removing ghpages) * Remove reference to sbt-ghpages plugin.
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- Jan 22, 2019
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David Biancolin authored
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- Jan 16, 2019
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David Biancolin authored
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- Jan 15, 2019
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Jack Koenig authored
Constant Propagate dshl and dshr with constant amounts
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- Jan 14, 2019
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Jack Koenig authored
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Jack Koenig authored
Fixes #990 h/t @pentin-as and @abejgonzalez
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Jack Koenig authored
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- Jan 08, 2019
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Jim Lawson authored
This fixes issue #988 I tried one alternative to this fix: record the time to do a *no rename* run (`depth = 0`) and check that the time to do the *deep rename* (`depth = 500`) was a reasonable multiple of the *no rename* test. Unfortunately, the discrepancies were all over the map, sometime as much three orders of magnitude difference. I decided the current fix was the simplest - don't enforce timing checks if we're doing coverage testing, although determining the latter is brittle.
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- Jan 05, 2019
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Jack Koenig authored
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Jack Koenig authored
Previously, components that did not affect the output would cause exceptions because they were missing from the label2group Map. This commit treats them as "reachable" by the ports so they are included in the default "ungrouped" group.
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- Jan 03, 2019
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Jack Koenig authored
This fixes an issue where expressions created by GroupComponents would be improperly lowered because they were not marked as references to instance ports.
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- Dec 26, 2018
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Edward Wang authored
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Adam Izraelevitz authored
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- Dec 22, 2018
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Albert Magyar authored
* Seal Direction trait * Add WRef factories for ports and instances
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Albert Magyar authored
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Schuyler Eldridge authored
Fix NoneCompiler outputForm
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- Dec 21, 2018
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Schuyler Eldridge authored
This adds a requirement that all Compilers must have at least one Transform. Without this, there is no way to determine the inputForm or outputForm of a given compiler as these are (rightly) defined in terms of the head/last transform. Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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Schuyler Eldridge authored
This changes the NoneCompiler to be a unary sequence consisting of an IdentityTransform. This fixes the inputForm and outputForm inherited methods that implicitly mandate a non-empty transform sequence. Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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- Dec 20, 2018
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Schuyler Eldridge authored
This adds an identity transform that applies an identity function to some CircuitState, i.e., it just returns the original CircuitState. This is useful for transform generators that may, for edge cases, generate an empty transform sequence. Other classes (e.g., Compiler) have explicit or implicit requirements that a transform sequence is non-empty. Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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- Dec 19, 2018
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Paul Rigge authored
* Give better error when mport references non-existent memory * Closes #796
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- Dec 14, 2018
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David Biancolin authored
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David Biancolin authored
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- Dec 12, 2018
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Schuyler Eldridge authored
Remove side effect from DiGraph sum
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Schuyler Eldridge authored
This fixes a bug where DiGraph summation (using the `+` operator) would mutate the DiGraph. This occurred because the underlying edges set was not being cloned. This is fixed to explicitly clone the underlying edges set. Signed-off-by:Schuyler Eldridge <schuyler.eldridge@ibm.com>
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- Dec 07, 2018
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Jack Koenig authored
Iterating on a HashSet could cause identical modules (including annotations) to not dedup
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Jack Koenig authored
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