This breaks firrtl.options.Stage into a small type hierarchy:

  * Phase: something that transforms an AnnotationSeq
  * Stage extends Phase: a Phase with a Command Line Interface

Some of the old "common options" (input annotation file and target
directory) are moved into firrtl.options and provided as part of the Stage
class. Stage will automatically preprocess an input annotation sequence to
resolve all input annotation files and add a default target directory.

Minor changes:

  * Adds ViewException
  * Stops mixing in the DoNotTerminateOnExit trait into the default Shell
    parser
  * Add StageOptionsView

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

- Remove firrtl.altIR package

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@gmail.com>

* Bump sbt to 1.2.6; update dependencies

* Remove left-over surgery items.

* Add explanation for explicit junit library dependency

Huge performance improvement when you have lots of ports for a given
module. Also split up some long implicit argument lines.

- Add firrtl.transforms.CombineCats
- Use CombineCats in LowFirrtlOptimization
- Modify Verilog emitter to allow for nested Cat DoPrims
- Modify firrtlEquivalenceTest to write input FIRRTL string to test directory

- Add deprecated TargetDirAnnotation type to firrtl package

TargetDirAnnotation was moved from firrtl to firrtl.stage. However, this
is only aliased as a val in the firrtl package object. This also needs to
be type aliased for matching against a type. This fixes a bug I ran across
in the visualizer.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

- Add, but do not use Options-mirroring Annotations

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

This shows an example of using a RegisteredLibrary, with the appropriate
META-INF ServiceLoader entry, that adds options from the InferReadWrite
and ReplSeqMem transforms.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

- Adds firrtl.options package and tests
- Does not use firrtl.options in any way

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

This adds a new package, "firrtl.options", that provides a framework for
working with options inside and outside FIRRTL.

Small changes:
  - Make TerminateOnExit return the correct exit code
  - Deprecate mutable TerminateOnExit
  - Add immutable DoNotTermianteOnExit

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

- Add Target.prettyPrint method
- Improve UninferredWidth exception message

This changes the CheckTypes.UniferredWidth exception to include the pretty
printed Target that was uninferred and suggests to the user that they may
have forgotten to assign to it. This changes the CheckTypes pass to
communicate the necessary Target information during AST traversal such
that when an uninferred width is found, the Target is known and available.

This also adds one test checking the message of the UniferredWidth
exception.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

This adds a pretty printer for firrtl.annotation.Target and associated
tests. This uses a tree-like output where the following target
~Circuit|Module/foo:Foo>ref.field[0] will serialize to:

  circuit Circuit:
  └── module Module:
      └── foo of Foo:
          └── ref.field[0]

This enables better error messages and a human readable syntax better than
the existing serialize method (and avoiding the need for users to
understand the Target serialization syntax), but that is not intended to
be deserialized nor space efficient.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

With the newest version of SBT, the commandline `sbt publish-local` should be changed to `sbt publishLocal`.

Adds performance improvements by removing list appends.

It is O(n) and every use is in an O(n) iteration resulting in O(n^2).
Same information can be extracted from create_exps which happens to also
be called at every use of get_flip.

When constructing the black box helper file list (firrtl_black_box_resource_files.f), filter out Verilog header files (*.vh) - Fixes #917

Formerly #865 

Major Code Changes/Features Added:

Added Target trait as replacement for Named
Added TargetToken as token in building Target
Added GenericTarget as a catch-all Target
Added CircuitTarget, ModuleTarget, ReferenceTarget, and InstanceTarget
Added ResolvePaths annotation
Added EliminateTargetPaths (and helper class DuplicationHelper)
Updated Dedup to work with instance annotations
Updated RenameMap to work with instance annotations
DCE & ConstantProp extend ResolveAnnotationPaths

- Travis unshallow if shallow clone breaks ancestry

This makes "skip chisel tests" work properly

This reverts commit 7e2f787e.

Added Target, which now supports Instance Annotations. See #865 for details.

Better error message on missing BlackBox resource