Changing simwrapper to group ports that go to different places, not quite there yet. Will allow simple bulk connecting at top-level

In process of adding FAME-1 transformation, updated todos in grammar file, updated Makefile to play nicer when firrtl is a submodule, fixed bug in Translator for single line scopes, fixed firrtl-scala script to point to firrtl.Driver instead of old firrtl.Test

Deleted extranous passes.stanza comments, updated standard passes. Added support for -b <backend> flag without any other specified passes in stanza, updated parser tests to work with stanza implementation.

Added support for -b <backend> so that specific passes can be run then a backend can be applied. Added firrtl compiler for emitting firrtl

Conflicts:
	Makefile

Updated Scala FIRRTL with Testing and Infer-Types Pass

Reorganized Primops (renamed from PrimOps), added maps and functions to convert object <=> string, added eqv and neqv

Added infer-types pass, seems to work. Added infer-types error checking, modified Logger slightly, added Primops object for utility functions, minor changes in Utils

Modified getType to return Type rather than Option[Type] which makes more sense for some applications, also fixed up printing to better match stanza implementation

Moved Logger to new private object DebugUtils, changed UInt/SInt value printing to match stanza implementation

Added initial support for debug printing for lit based testing, most types of printVars still missing. Added Logger class for debug printing

Added support for no width to mean unknown, and print nothing instead of <?> for unknown width. Also added test to check this

This way I don't have to type "make install-linux" whenever a new
Stanza zip drops.

Changed DefMemory to be a non-vector type with a size member

Conflicts:
	README.md

Add Scala implementation to firrtl repo

Merged in Scala implementation of FIRRTL IR, parser, and serialization (ie. AST -> String). Uses ANTLRv4 to generate concrete syntax parser

Change of FIRRTL semantics!

Fix init accessor

Assignments to a register are no longer affected by enclosing when
statements:

when p :
  reg r : UInt,clk,reset
  r := a

will lower to:

reg r : UInt,clk,reset
r := a

instead of:

reg r : UInt,clk,reset
when p : r := a

Make Link.fir reference relative path