Added printf to show when a decoupled tester waiting for valid is doing so,  this should ultimately go away
Added init code for EnqIO and DeqIO, not sure that I agree with sense of valid use in EnqIO#enq
New and better version of Router being worked out here, first steps pass, getting closer

Fixed exception thrown when no pokes or expects in the unittester, now doesn't display table in this degenerate case
Fixed program counter size when there were exactly 2^n steps

Fixed SlowDecoupledAdder

the lastest refactoring of the decoupled tester, this version groups the events by their controlling device, this make the code a little cleaner and made it easier to manage the handling of the valid alternative

Add a do_flip parameterto DecoupledIO that DeqIO can use instead of inplace flip

Add '=/=' to bits, which does the same as '!='

It looks like this is in Chisel2 now, and some stuff in uncore is using it.
IIRC, we decided that this was the correct thing to do for some Scala style
reasons.

almost there, cannot set the input.valid port to true, any attempt to do so seems to create a verilator does not converge

Now entering type hell!

"Shouldn't be here" when running DecoupledAdderTester

Fixed GCD to work like tutorial
Added exerciser example to Adder in unit_tests