Fixed GCD to work like tutorial
Added exerciser example to Adder in unit_tests

would be nice to have some of this verbosity controlled by a parameter file.
Ability lacking in firrtl printf to control column width makes displays much uglier

Seems like I now have a quirkly but basic system that gather all the port names (even if deeply nested) in to a Map

Print test stdout/stderr to console,
works for my use cases

Modify TestDriver to take resource paths instead of Files
Tested in chisel3:new_unit_tester
Tested in chisel-tutorial:chisel3prep

Added a test based version of the adder

still failing to assert properly

Fix Counter doc

Refactor tests to use stop() and assert() instead of io.error/io.done

Gate assert, printf, stop by reset
Fix testbenches that never worked
Change simulation prints to display cycle at which test was signaled to end, not when simulator stops
Better documentation for Counter

Add stop() in BasicTester as a replacement for io.done

# Conflicts:
#	src/main/scala/Chisel/testers/TesterDriver.scala

Add support for printf and asserts, add testbench for asserts and printf