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Unverified Commit ac3d7e2d authored by mergify[bot]'s avatar mergify[bot] Committed by GitHub
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Remove extra bit from `SRAMInterface` address width (backport #3830) (#3839) 

* Remove extra bit from `SRAMInterface` address width (#3830)

(cherry picked from commit 4f1f4a77

)

# Conflicts:
#	src/test/scala/chiselTests/util/SRAMSpec.scala

* Resolve backport conflicts

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Co-authored-by: default avatarDeborah Soung <debs@sifive.com>
Co-authored-by: default avatarJack Koenig <koenig@sifive.com>
parent b5f000f4
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