Change the width of static shift right

* A UInt shifted right by a static amount >= its width will now result
  in a 0-bit UInt
* An SInt shifted right by a static amount >= its width will now result
  in a 1-bit SInt (the sign bit)

This is a change for SInts which Chisel would treat the output as a
0-bit SInt. However, FIRRTL implemented different behavior where both
UInts and SInts would result in 1-bit values (which shifted right by an
amount >= the width of the input).

This makes the width behavior consistent with the FIRRTL 4.0.0 spec.