Commit 325e4880 authored by Schuyler Eldridge's avatar Schuyler Eldridge
Browse files

Add chisel3.stage.phases.Convert Phase



This coalesces three distinct operations into one Convert Phase:

  1. Chisel Circuit to FIRRTL Circuit (CHIRRTL) conversion
  2. Conversion of Chisel Annotations to FIRRTL Annotations
  3. Generation of RunFirrtlTransformAnnotations

Co-Authored-By: default avatarSchuyler Eldridge <schuyler.eldridge@ibm.com>
Co-Authored-By: default avatarchick <chick@qrhino.com>
Signed-off-by: default avatarSchuyler Eldridge <schuyler.eldridge@ibm.com>
parent 4c48d5a9
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