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freechipsproject
chisel3
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turkducken
2408df0a
·
Added motivating use cases to tests
·
Oct 14, 2022
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record-autoclonetype-3.5.x
1b1827be
·
Add opt-in AutoCloneType for Records
·
Oct 16, 2022
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mixed-vec-compile-options
3ce57af2
·
checkpoint: failing test
·
Oct 17, 2022
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fix-2773-35x
b897bea2
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better name
·
Oct 19, 2022
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mixed-vec-no-compile-options
8c0f4132
·
assign more directions
·
Oct 21, 2022
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fix-blackbox-compat-35x
d0bad90b
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never use legacy connect for records, always try blowing it to individual elements
·
Oct 21, 2022
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fix-for-blackbox-assign
ad1bd731
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Merge branch 'master' into fix-for-blackbox-assign
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Oct 21, 2022
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unit-tests-and-fixes-version-2
1adb7bc5
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more unspecified purging
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Oct 22, 2022
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preview-of-port-source-locators
c5f61e92
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show module on error
·
Oct 27, 2022
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3.5.x-turkducken
3787c3f3
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Turducken squashed
·
Oct 27, 2022
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dev/seldridge/deprecate-ChiselAnnotation
5afef6b2
·
Remove ChiselAnnotation from Docs
·
Oct 31, 2022
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3.5.x-backport-turkducken-try2
9b6cfbdb
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Builder.error now uses sourceinfo when available
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Nov 04, 2022
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3.5.x-backport-turkducken-try3
6c907820
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Builder.error now uses sourceinfo when available
·
Nov 09, 2022
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efficient-commands-2
bfbf8427
·
Use ListBuffer for _commands
·
Nov 10, 2022
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tracemem
a4a7d9b1
·
add TraceName test for CIRCT.
·
Nov 18, 2022
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compressed-namespace-save-contains-check
2958f5b9
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WIP on trying to save a contains check in Namespace
·
Nov 19, 2022
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compressed-namespace-java-hashmap
775a5fff
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Namespace use java.util.HashMap
·
Nov 21, 2022
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change-chisel-stage-apis-add-more-booleans
ae6ef7d5
·
Added ChiselStage flags for common test settings
·
Nov 29, 2022
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add_upickle
6d10805e
·
add upickle to dependency
·
Nov 30, 2022
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auto_bb
68c3499a
·
add apply function for AutoBundleFromVerilog
·
Dec 06, 2022
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