added support for writing option bytes on STM32L0

Fix flash size of stm32discovery vl

Do not issue JTAG reset on stlink-v1

* Clear previously written page number (if any)
* Remove unrelated change

CS32F103C8T6 is clone of STM32F103C8T6 but with incorrect core_id number.

also few cppcheck warnings

* Add simple read/write support for STM32WB55 chips.

* Clean up and unify G0/WB erase/program operations.

* Fix apparent issue with STM32G0 flashing.

* Add pid for "STM32+Audio" v2-1 firmware

* Add support for "STM32+Audio" v2-1 firmware,.

* Add udev rules for "STM32+Audio" firmware

* Add simple read/write support for STM32WB55 chips.

* Clean up and unify G0/WB erase/program operations.

* poc worked, writting stm32G070 option bytes

* Update README.md

adjust layout

* code review changes

See https://github.com/texane/stlink/issues/774

the command 'debuild' is (and always was) part of the devscripts package

This reverts commit 7651d211.

* Set SWD clock before using SWD (#107, #568 ?)

* Make st-util -v print more than default

* Flush output streams explicitly. Fix #665

On Win32 redirecting streams makes them buffered, therefore without
flushing there would be no output before exit. Stdout and stderr are
also often buffered differently, making them disordered.

* Add preliminary support for some STM32G0 chips.

* Fix a bug in the 'which page to erase' logic.

When I flashed a program with more than one page, I noticed that this logic did not un-set previously-set 'PNG' bits. So it would erase page 1, then page 3, then page 3...

See issue #752.

* Only do bank calculatio on SRM32L4 devices with dual banked flash

RM0394 covers the STM32L41xx, 42xx, 43xx, 44xx, 45xx, and 46xx. These
devices are all employ single banked flash and have chip id's
of 0x464 for the 41xx/42xx, 0x435 for 43xx/44xx, and 0x462 for 45xx/46xx
It's also worth noting that bit 21 of the FLASH_OPTR register is marked
as resevred for these chips, and isn't an indicator of dual banked
flash.

RM0392 covers the STM32L4x1, cpu_id 0x415 and can be dual banked.

RM0351 covers the STM32L4x5/4x6, cpu_ids 0x415 & 0x461 and can be dual
banked

RM0432 covers the STM32L4Rx/4Sx, cpu_id 0x470 and can be dual banked.

This PR modifies the calculate_L4_page functio to only factor bank
calculations for the devices above which can support dual banked flash.

* Converted tabs to spaces on added line

Fixes #748