Commits · f1-shell-dev · github.com / Phantom1003 / fpga-shells

Aug 16, 2019
- fixed imports and added 'blacklist' section for DMA_PCIS io · d42b4892
  reedafoster authored Aug 15, 2019
  
  d42b4892
- removed sv wrapper for toplevel, file is included by default in tools-awsf1-sifive package · 2eb47334
  reedafoster authored Aug 15, 2019
  
  2eb47334
- added pcim interface · 01f7dc87
  reedafoster authored Aug 15, 2019
  
  01f7dc87
Aug 02, 2019
- fixed critical assignment error in sv wrapper that was causing io placement to fail · 6a113250
  reedafoster authored Aug 01, 2019
  
  6a113250
Jul 20, 2019
- Merge branch 'f1-shell-dev' of github.com:sifive/fpga-shells into f1-shell-dev · e5363795
  reedafoster authored Jul 19, 2019
  
  e5363795
- added note to resolve clock routing reduction that causes bitgeneration error · 92f3da99
  reedafoster authored Jul 19, 2019
  
  92f3da99
Jul 19, 2019
- added reminder to set PCI IDs in cl_id_defines.vh · 3e25d87c
  reedafoster authored Jul 18, 2019
  
  3e25d87c
Jul 17, 2019
- removed unnecessary imports in CLPorts · 054965d6
  reedafoster authored Jul 16, 2019
  
  054965d6
Jul 09, 2019
- added note about placer constraint for clock cascading · f3a688c0
  reedafoster authored Jul 08, 2019
  
  f3a688c0
Jul 02, 2019
- added sv wrapper for 1-wide bitvector sh/cl compatability · ee272fcd
  reedafoster authored Jul 01, 2019
  
  ee272fcd
Jun 29, 2019
- added documentation on setting up DCP generation from RTL on AMI · 82a3a4ba
  reedafoster authored Jun 28, 2019
  
  82a3a4ba
Jun 28, 2019
- created .sv wrapper generator for sh_ddr; passes synthesis now · e7ee5157
  reedafoster authored Jun 27, 2019
  
  e7ee5157
Jun 26, 2019
- added autogeneration of amzn-required cl port spec · a2aada56
  reedafoster authored Jun 25, 2019
  
  a2aada56
Jun 25, 2019
- found workaround for naming toplevel IO · ebd18969
  reedafoster authored Jun 24, 2019
  
  ebd18969
Jun 22, 2019
- fixed memory issue; reduced AXI ID-indexer size from 16 to 4 bits · 67c4082b
  reedafoster authored Jun 21, 2019
  
  67c4082b
Jun 21, 2019
- running into JVM memory errors with u540400kLUT · e2da8daa
  reedafoster authored Jun 20, 2019
  
  e2da8daa
Jun 20, 2019
- separate bundle bridges for Analog and IO, verilog generation works · f10d9b28
  reedafoster authored Jun 19, 2019
  
  f10d9b28
- still working on Analog support - doesn't build but seem to be on the right track · 4921919b
  Reed Foster authored Jun 19, 2019
  
  4921919b
Jun 18, 2019
- created basic shell and DDR IP blackboxing for Amazon F1 FPGAs · 2174368d
  Reed Foster authored Jun 17, 2019
  
  2174368d
Apr 27, 2019
- fixing vc707 tcl constraints · 0d23acd4
  Erik Danie authored Apr 26, 2019
  
  0d23acd4
Apr 23, 2019
- Merge pull request #65 from sifive/timing-fix · b6d3b66b
  Erik Danie authored Apr 22, 2019
```
false path to fix timing
```
  b6d3b66b
- false path to fix timing · a31c2852
  Erik Danie authored Apr 22, 2019
  
  a31c2852
Apr 18, 2019
- Merge branch trace-encoder: Expose JC for trace I/O (#63) · 5e7cab77
  Ernie Edgar authored Apr 17, 2019
```
Expose PMOD JC for trace connections.
```
  5e7cab77
Apr 13, 2019
- Merge pull request #62 from sifive/gpop_pmod_overlay · 1761a588
  Erik Danie authored Apr 12, 2019
```
Gpio pmod overlay
```
  1761a588
Apr 09, 2019
- Merge pull request #56 from sifive/jtag-on-lcd · 4145f12a
  Erik Danie authored Apr 08, 2019
```
Move JTAG to LCD connector
```
  4145f12a
Apr 06, 2019
- fixed stripbits · ae15f625
  Erik Danie authored Apr 05, 2019
  
  ae15f625
Apr 02, 2019
- Merge pull request #61 from felixonmars/patch-1 · 30b0bcfc
  Erik Danie authored Apr 01, 2019
```
Correct typos in init.tcl
```
  30b0bcfc
- Correct typos in init.tcl · c0b809c2
  Felix Yan authored Apr 02, 2019
  
  c0b809c2
Mar 28, 2019
- Merge pull request #60 from sifive/fix-polarfire-compile · 3bc85e73
  Ryan Macdonald authored Mar 27, 2019
```
Fix Polarfire compile errors
```
  3bc85e73
- updating for libero 12.0 · 3fd241bc
  Erik Danie authored Mar 20, 2019
  
  3fd241bc
- Merge pull request #59 from sifive/ulpi-vc707-constraints · 8cd21a76
  Ryan Macdonald authored Mar 27, 2019
```
VC707: Add ULPI constraints
```
  8cd21a76
- VC707: Make ULPI constraints conditional on ulpi_clk presence · 1a512b74
  Ryan Macdonald authored Mar 27, 2019
  
  1a512b74
Mar 26, 2019
- gpio and shell updates · a07d226e
  Erik Danie authored Mar 25, 2019
  
  a07d226e
Mar 23, 2019
- VC707: Add ULPI constraints · 09bee5ce
  Ryan Macdonald authored Mar 21, 2019
  
  09bee5ce
Mar 21, 2019
- Merge pull request #54 from donthus/master · 238a4c30
  Erik Danie authored Mar 20, 2019
```
updated for libero v12.0
```
  238a4c30
Mar 08, 2019
- adding preliminary button overlay · de5992aa
  Erik Danie authored Mar 07, 2019
  
  de5992aa
- gpio pmod plus shell refactor · 63a7afa1
  Erik Danie authored Mar 07, 2019
  
  63a7afa1
Mar 01, 2019
- Move JTAG to LCD connector · 174c21e6
  Troy Benjegerdes authored Feb 28, 2019
  
  174c21e6
Feb 23, 2019
- Merge pull request #55 from sifive/qspi_newshell · 791965a5
  Erik Danie authored Feb 22, 2019
```
Qspi newshell
```
  791965a5
Feb 20, 2019
- adding missing file · ad2efcb4
  Erik Danie authored Feb 19, 2019
  
  ad2efcb4