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unsigned int | intel_buf_width () |
unsigned int | intel_buf_height () |
unsigned int | intel_buf_aux_width () |
unsigned int | intel_buf_aux_height () |
struct buf_ops * | buf_ops_create () |
void | buf_ops_destroy () |
bool | buf_ops_set_software_tiling () |
void | intel_buf_to_linear () |
void | linear_to_intel_buf () |
bool | buf_ops_has_hw_fence () |
bool | buf_ops_has_tiling_support () |
void | intel_buf_init () |
void | intel_buf_close () |
void | intel_buf_init_using_handle () |
Intel GPU devices supports different set of tiled surfaces. Checking each time what tile formats are supports is cumbersome and error prone.
Buffer operation (buf_ops) provide a wrapper to conditional code which can be used without worrying of implementation details giving:
copy linear to tiled buffer
copy tiled buffer to linear
Following code order should be used (linear is plain memory with some image data):
1 2 3 4 5 6 7 8 9 10 11 12 13 |
struct buf_ops *bops; struct intel_buf ibuf; ... bops = buf_ops_create(fd); intel_buf_init(bops, &ibuf, 512, 512, 32, I915_TILING_X, false); ... linear_to_intel_buf(bops, &ibuf, linear); ... intel_buf_to_linear(bops, &ibuf, linear); ... intel_buf_close(bops, &ibuf); ... buf_ops_destroy(bops); |
Calling buf_ops_create(fd) probes hardware capabilities (supported fences,
swizzling) and returns opaque pointer to buf_ops. From now on
intel_buf_to_linear()
and linear_to_intel_buf()
will choose appropriate
function to do the job.
Note: bufops doesn't support SW tiling code yet.
struct buf_ops *
buf_ops_create (int fd
);
Create buf_ops structure depending on fd-device capabilities.
bool buf_ops_set_software_tiling (struct buf_ops *bops
,uint32_t tiling
,bool use_software_tiling
);
Function allows switch X / Y surfaces to software / hardware copying methods which honors tiling and swizzling.
void intel_buf_to_linear (struct buf_ops *bops
,struct intel_buf *buf
,uint32_t *linear
);
void linear_to_intel_buf (struct buf_ops *bops
,struct intel_buf *buf
,uint32_t *linear
);
bool buf_ops_has_hw_fence (struct buf_ops *bops
,uint32_t tiling
);
Function checks if surface with tiling has HW fences which can be used to copy it via gtt.
bool buf_ops_has_tiling_support (struct buf_ops *bops
,uint32_t tiling
);
Function checks capabilities to handle surfaces with tiling in GPU.
void intel_buf_init (struct buf_ops *bops
,struct intel_buf *buf
,int width
,int height
,int bpp
,uint32_t tiling
,uint32_t compression
);
Function creates new BO within intel_buf structure and fills all structure fields.
Note. For X / Y if GPU supports fences HW tiling is configured.
void intel_buf_close (struct buf_ops *bops
,struct intel_buf *buf
);
Function closes gem BO inside intel_buf.
void intel_buf_init_using_handle (struct buf_ops *bops
,uint32_t handle
,struct intel_buf *buf
,int width
,int height
,int bpp
,uint32_t req_tiling
,uint32_t compression
);
Function configures BO handle within intel_buf structure passed by the caller (with all its metadata - width, height, ...). Useful if BO was created outside.
Note: intel_buf_close()
can be used to close the BO handle, but caller
must be aware to not close the BO twice.