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/*=======================================================================================*/
/* RISCV Sail Model */
/* */
/* This Sail RISC-V architecture model, comprising all files and */
/* directories except for the snapshots of the Lem and Sail libraries */
/* in the prover_snapshots directory (which include copies of their */
/* licences), is subject to the BSD two-clause licence below. */
/* */
/* Copyright (c) 2017-2021 */
/* Prashanth Mundkur */
/* Rishiyur S. Nikhil and Bluespec, Inc. */
/* Jon French */
/* Brian Campbell */
/* Robert Norton-Wright */
/* Alasdair Armstrong */
/* Thomas Bauereiss */
/* Shaked Flur */
/* Christopher Pulte */
/* Peter Sewell */
/* Alexander Richardson */
/* Hesham Almatary */
/* Jessica Clarke */
/* Microsoft, for contributions by Robert Norton-Wright and Nathaniel Wesley Filardo */
/* Peter Rugg */
/* Aril Computer Corp., for contributions by Scott Johnson */
/* */
/* All rights reserved. */
/* */
/* This software was developed by the above within the Rigorous */
/* Engineering of Mainstream Systems (REMS) project, partly funded by */
/* EPSRC grant EP/K008528/1, at the Universities of Cambridge and */
/* Edinburgh. */
/* */
/* This software was developed by SRI International and the University of */
/* Cambridge Computer Laboratory (Department of Computer Science and */
/* Technology) under DARPA/AFRL contract FA8650-18-C-7809 ("CIFV"), and */
/* under DARPA contract HR0011-18-C-0016 ("ECATS") as part of the DARPA */
/* SSITH research programme. */
/* */
/* This project has received funding from the European Research Council */
/* (ERC) under the European Union’s Horizon 2020 research and innovation */
/* programme (grant agreement 789108, ELVER). */
/* */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* 1. Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* 2. Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in */
/* the documentation and/or other materials provided with the */
/* distribution. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */
/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A */
/* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */
/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF */
/* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND */
/* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, */
/* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
/* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF */
/* SUCH DAMAGE. */
/*=======================================================================================*/
/* failure modes for address-translation/page-table-walks */
union PTW_Error = {
PTW_Invalid_Addr : unit, /* invalid source address */
PTW_Access : unit, /* physical memory access error for a PTE */
PTW_Invalid_PTE : unit,
PTW_No_Permission : unit,
PTW_Misaligned : unit, /* misaligned superpage */
PTW_PTE_Update : unit, /* PTE update needed but not enabled */
PTW_Ext_Error : ext_ptw_error /* parameterized for errors from extensions */
}
val ptw_error_to_str : PTW_Error -> string
function ptw_error_to_str(e) =
match (e) {
PTW_Invalid_Addr() => "invalid-source-addr",
PTW_Access() => "mem-access-error",
PTW_Invalid_PTE() => "invalid-pte",
PTW_No_Permission() => "no-permission",
PTW_Misaligned() => "misaligned-superpage",
PTW_PTE_Update() => "pte-update-needed",
PTW_Ext_Error(e) => "extension-error"
}
overload to_str = {ptw_error_to_str}
/* hook for extensions to customize errors reported by page-table
* walks during address translation; it typically works in conjunction
* with any customization to checkPTEPermission().
*/
function ext_get_ptw_error(eptwf : ext_ptw_fail) -> PTW_Error =
PTW_No_Permission()
/* conversion of these translation/PTW failures into architectural exceptions */
function translationException(a : AccessType(ext_access_type), f : PTW_Error) -> ExceptionType = {
let e : ExceptionType =
match (a, f) {
(_, PTW_Ext_Error(e)) => E_Extension(ext_translate_exception(e)),
(ReadWrite(_), PTW_Access()) => E_SAMO_Access_Fault(),
(ReadWrite(_), _) => E_SAMO_Page_Fault(),
(Read(_), PTW_Access()) => E_Load_Access_Fault(),
(Read(_), _) => E_Load_Page_Fault(),
(Write(_), PTW_Access()) => E_SAMO_Access_Fault(),
(Write(_), _) => E_SAMO_Page_Fault(),
(Execute(), PTW_Access()) => E_Fetch_Access_Fault(),
(Execute(), _) => E_Fetch_Page_Fault()
} in {
/* print_mem("translationException(" ^ a ^ ", " ^ f ^ ") -> " ^ e); */
e
}
}
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