From cc996651a3a756c862251e470dd21d9e19a4d420 Mon Sep 17 00:00:00 2001 From: Prashanth Mundkur Date: Tue, 16 Jul 2019 17:37:16 -0700 Subject: Use reserved bits in PTEs for vmem extensions on RV64, as allowed by the spec. This is not possible for RV32, so pass zeros there. --- model/riscv_vmem_common.sail | 2 ++ 1 file changed, 2 insertions(+) (limited to 'model/riscv_vmem_common.sail') diff --git a/model/riscv_vmem_common.sail b/model/riscv_vmem_common.sail index f77366b..1a82d4c 100644 --- a/model/riscv_vmem_common.sail +++ b/model/riscv_vmem_common.sail @@ -106,6 +106,7 @@ bitfield SV39_Paddr : paddr64 = { } bitfield SV39_PTE : pte64 = { + Ext : 63 .. 54, PPNi : 53 .. 10, RSW : 9 .. 8, BITS : 7 .. 0 @@ -132,6 +133,7 @@ bitfield SV48_Paddr : paddr64 = { } bitfield SV48_PTE : pte48 = { + Ext : 63 .. 54, PPNi : 53 .. 10, RSW : 9 .. 8, BITS : 7 .. 0 -- cgit v1.1